The performance evaluation, workload characterization, and trace-driven simulation of a hypercube multicomputer running realistic workloads are presented. Eleven representative parallel applications were selected as benchmarks. Software monitoring techniques were then used to collect execution traces. Based on the measurement results, both the computation and communication behavior of these parallel programs were investigated. The various time interval distributions were modeled by statistical functions which were verified by a nonlinear regression technique using the empirical data. The temporal and spatial localities of message destinations were also studied. A model for the temporal locality of message length was introduced and used to analyze the communication traces. A trace-drive simulation environment, which uses the communication patterns of the parallel programs as inputs, was developed to study the behavior of the communication hardware under real workload. Simulation results on DMA and link utilizations are reported.>

The authors present the architecture, methodology and performance evaluation of a message-passing coprocessor (MPC) which can accelerate message communication in a distributed memory multicomputer (i.e. iPSC/2 hypercube). The MPC is a microprogrammable processor which offloads from the CPU the burden of communication and speeds up the software processing by directly executing message passing instructions in microcode. It supports process scheduling, message buffer management, and fast buffer copying. The most unique feature of the MPC is that it performs software caching for expected message destinations and buffers. The MPC works closely with a virtual channel router which is a smart routing controller and supports virtual channels and cached circuits. The software and hardware overhead of communication can be reduced significantly by these two processors. The performance is confirmed by trace-driven simulation.>