Cyclic Queuing and Forwarding (CQF) is an increasingly adopted mechanism in Time-Sensitive Networking (TSN) for bounding end-to-end delays through fixed-length cycles with alternating transmission queues. While timing guarantees for CQF flows are well established under both time-triggered (TT) and event-triggered (ET) implementations, the worst-case interference that CQF may impose on other traffic classes in mixed-criticality TSN networks remains an open problem. This challenge is exacerbated by the structured, non-work-conserving behavior of CQF and the complexity of its interaction with heterogeneous TSN scheduling mechanisms such as TAS, CBS, and SP. This paper presents the first formal framework for quantifying the worst-case interference caused by CQF on other schedulers under both TT- and ET-based implementations. We propose a network-calculus-based CQF real-time interface abstraction that models the residual service available to coexisting traffic. We formally derive closed-form upper bounds on CQF-induced interference, explicitly capturing bidirectional interactions between CQF and both higher- and lower-priority traffic classes. These bounds can be modularly and seamlessly integrated into existing schedulability analyses, enabling scalable and compositional timing verification in hybrid TSN architectures. Extensive evaluations on synthetic benchmarks and realistic TSN configurations demonstrate the analytical effectiveness, scalability, and practical applicability of the proposed framework in certifying end-to-end guarantees in mixed-criticality TSN systems.

ABSTRACT Wireless avionics intra‐communications (WAIC) technologies play an important role in the real‐time transmission between airborne equipment. As the number of deployed WAIC nodes increases, severe inter‐user and inter‐cabin interference occurs, degrading system performance and fairness. In this paper, a deep reinforcement learning‐based interference alignment and power allocation (DRL‐IAPA) scheme is proposed for multi‐user WAIC system. By integrating interference alignment with a deep deterministic policy gradient (DDPG) algorithm, the DRL‐IAPA scheme can mitigate interference, optimize power allocation, and ensure fairness among users under stringent latency and power constraints. Simulation results show that DRL‐IAPA improves spectral efficiency and fairness over traditional and heuristic‐based methods, and demonstrates scalability and consistent performance across various network configurations. Compared with other representative DRL algorithms, such as proximal policy optimization and soft actor–critic, our proposed DDPG‐based approach exhibits faster convergence, higher achievable reward, and better applicability in dynamic WAIC environments.

As the aviation industry progresses towards More Electric Aircraft (MEA), the demand for robust and efficient data communication systems intensifies. Traditional fieldbus systems are burdened by high installation costs and substantial weight due to extensive cabling requirements. The Power Line Communication (PLC) technology presents a promising alternative; however, its adaptation to the stringent real-time demands of airborne environments poses significant challenges. To address this, this paper introduces a novel Credit-Based Shaper with Channel Contention (CBSCC) mechanism designed to optimize traffic management in airborne PLC networks. This mechanism operates at the Medium Access Control (MAC) layer of the HomePlug AV 2 protocol, employing a dynamic configuration approach informed by Network Calculus (NC). This approach utilizes End-to-End Delay (E2ED) requirements of data flows and network configuration details to calculate the parameters for the CBSCC traffic shaper. Comprehensive simulations conducted with OMNeT++ demonstrate the efficacy of CBSCC, demonstrating marked improvements in E2ED satisfaction for all data frames, reduced average access delays, and enhanced fairness across different priority levels compared to the HomePlug AV2 protocol and previous traffic management strategies. The findings confirm that the CBSCC mechanism substantially alleviates the starvation of lower-priority traffic, boosts network efficiency, and ensures robust real-time guarantees essential for the safety and reliability of airborne communication systems. This research represents a substantial advancement over existing solutions, aligning with the evolving needs of MEA implementations.

Time-Triggered Protocol (TTP) bus is a kind of multiple accessing bus with fault-tolerance mechanism for real-time communications, e.g. for distributed control systems. Fault-tolerance for the Group Membership service of TTP/C can be comprehensively verified by running a suite of simulation models, which designed and operated with the TTP's distributed clock synchronization mechanism, and implemented under MAT-LAB/Simulink/SimEvents environment. The original membership fault-tolerant service (MFS) algorithm can provide fault-tolerant service guarantees for nodes that access the bus in exclusive time slots regardless sharing slots. On the other side, an improved membership fault-tolerant service (IMFS) algorithm is presented to guarantee nodes with bus access in multiplexed time slots and is designed to be compatible with nodes with bus access in exclusive time slots. During bus accessing, the IMFS algorithm can rejoin any node that has a transient failure in the membership within a bounded time interval; the IMFS algorithm can also block any node that occurs a permanent failure while keeping the other nodes' normal bus accessing. Case studies and simulation results show that our IMFS algorithm is compatible with the MFS algorithm, either with multiplexed time slots or without it, and has lower amount of packet losses.

Abstract In avionics system networking, mixed‐critical networks are commonly used to integrate system applications with different levels of guarantees for various traffic classes on a shared resource platform, effectively addressing issues such as cabling, cost, weight, volume, power consumption, etc. However, current fault recovery and reconfiguration techniques mainly focus on high‐priority time‐triggered (TT) traffic, often neglecting the impact of TT traffic reconfiguration on low‐priority traffic. This paper proposes an avionics mixed‐critical networking approach based on the IEEE 802.1CB protocol, which is shown to be more effective for the post‐failure recovery of Rate‐Constrained (RC) traffic (a typical type of low‐priority traffic in TT networks). Furthermore, an elastic reconfiguration algorithm is presented to ensure quality of service for RC traffic during and after reconfiguration, preventing arbitrary application and traffic shutdown triggered by TT traffic reconfiguration. Simulations demonstrate that the proposed approach and algorithm can significantly improve the post‐failure recovery ratio of RC traffic, as well as guarantee quality of service and network throughput of RC traffic during and after reconfiguration to a certain extent.

Time-Sensitive Networking (TSN) evolves from Ethernet AVB in which the Credit-Based Shaping (CBS) is employed to guarantee the deterministic transmission of traffic. In CBS, the real-time performance of traffic associated with the credits can practicably settle the uncertainty of queueing and forwarding for stream-reservation traffic. Hence, the optimization of bandwidth allocation under the CBS becomes a key point to ensure guaranteed performance in the network. In this paper, a bandwidth allocation method is proposed for stream-reservation traffic while the real-time requirements are satisfied. We first illustrate the significance of appropriate bandwidth allocation for traffic under the CBS and construct a general schema for its bandwidth allocation. Also, the influences of the protected window for Control Data Traffic (CDT) on stream-reservation traffic are considered in our method. Further, mathematical models are constructed to analyze the delay bounds and backlogs of traffic to form the feedback for the optimal bandwidth allocation process. Finally, two node-level cases with different bandwidth utilization and a synthetic industrial networking scenario are carried out to demonstrate our method. The results confirm that the excessive reserved bandwidth does not necessarily decrease the delay bound, especially under the high traffic loads scenario. A more desirable bandwidth allocation strategy under the CBS mechanism is that the reserved bandwidth should be just enough according to the traffic loads to ensure the deterministic transmission of traffic.

Time-Sensitive Networking (TSN) is a collection of standards that extend Ethernet to support safety-critical and real-time applications. TSN integrates multiple traffic types, i.e., Time-Triggered (TT) traffic scheduled based on Gate-Control-Lists (GCLs), Audio-Video-Bridging (AVB) traffic that requires bounded latencies, and Best-Effort (BE) traffic, for which no guarantees are provided. This paper proposes a Network Calculus-based approach to determine the worst-case end-to-end delays of AVB traffic in a TSN network with both non-preemption and preemption modes. We consider the effects of TT traffic due to GCLs, "guard bands", i.e., time windows that block other traffic from transmitting, and preemption overhead on the service for AVB traffic. We provide a proof of non-overflow condition for AVB credit, which is used to control the AVB traffic transmission. The analysis method is evaluated on realistic test cases, and compared to related work.

Distributed clock synchronization protocol, adopted by TTEthernet, must be analyzed in a comprehensive manner, especially in failure mode or failure pressure to meet the requirements of safety critical certification. Although codes of the functional layer of the hardware description model cannot be integrated, they can gradually refine the highly abstract model into a behavior level model or register level model with using SystemC class library. Because fail-omission failure may occur in each state of the synchronization devices, SystemC is used to establish the executable model of synchronization master and compression master, and then to build the corresponding testbench, which can show the working state of startup scenario featuring a faulty synchronization master. This method not only tests the consistency of hardware implementation and agreement but also verifies the correctness of the fault-tolerant protocol under failure pressure. This process provides a rapid prototyping basis for the development of field programmable devices from requirements definition to hardware implementation, improves design efficiency and saves design costs especially for multiple embedded designs with time-based real-time network.