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Shashi K. Mehra

dblp:00/658 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1980
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 77% Processor architecture and microarchitecture · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
queueing analysis
0.011980
A Comparative Study of Some Two-Processor Organizations · IEEE Trans. Computers 1980
Processor architecture and microarchitecture
parallel computer organization
0.011980
A Comparative Study of Some Two-Processor Organizations · IEEE Trans. Computers 1980

Methods — techniques the papers use, named apart from their topics

simulation · 0.0queueing analysis · 0.0
YearPublicationVenuePosition
1980 A Comparative Study of Some Two-Processor Organizations
abstract
In many applications, parallelism inherent in a computation can be exploited by using a parallel computer organization. Such organizations may suffer throughput degradation because of data dependencies. The case of no data dependencies is considered. In this case, the throughput realized is dependent on the actual manner in which the parallel computer system is organized. A comparative performance study of four models of two-processor organizations is presented. The performance evaluation is through queueing analysis or simulation, the aim being to compare their response times under different workloads. This study also indicates the possibility of switching between alternate organizations in a dynamically reconfigurable system.
Shashi K. Mehra, Johnny W. Wong, Jayanti C. Majithia
IEEE Trans. Computers1