The accurate modeling of distortion behavior in GaN-based High Electron Mobility Transistors (HEMTs) is crucial for the design of high-frequency integrated circuits (ICs). We demonstrate a virtual-source-based modeling approach to describe the DC and RF characteristics of 40 nm GaN HEMT technology. The model passes the Gummal symmetry test and is compatible with commercial EDA tools for switching GaN circuit design and simulation. The model parameters are extracted based on DC I-V and S-parameter measurements of device samples with different widths (12x50, 6x50, and 4x37.5 µm) over a wide bias and frequency range. The all-region model considers the effects of terminal parasitic impedance, self-heating, and quasi-ballistic transport, and shows excellent scalability and extrapolation accuracy by successfully predicting large- and small-signal characteristics of a 2x25 µm width GaN HEMT. With build-in physical insight, the model can help provide insights of the key nonlinearity variation contributors from a practical modeling point of view.

Full-duplex (FD) wireless can significantly enhance spectrum efficiency but requires effective self-interference (SI) cancellers. RF SI cancellation (SIC) via frequency-domain equalization (FDE), where bandpass filters channelize the SI, is suited for integrated circuits (ICs). In this paper, we explore the limits and higher layer challenges associated with using such cancellers. We evaluate the performance of a custom FDE-based canceller using two testbeds; one with mobile FD radios and the other with upgraded, static FD radios in the PAWR COSMOS testbed. The latter is a lasting artifact for the research community, alongside a dataset containing baseband waveforms captured on the COSMOS FD radios, facilitating FD-related experimentation at the higher networking layers. We evaluate the performance of the FDE-based FD radios in both testbeds, with experiments showing 95 dB overall achieved SIC (52 dB from RF SIC) across 20 MHz bandwidth. We conduct network-level experiments for (i) uplink-downlink networks with inter-user interference, and (ii) heterogeneous networks with half-duplex and FD users, showing FD gains of$1.14\times $–$1.25\times $and$1.25\times $–$1.73\times $, respectively, confirming analytical results. We also evaluate the performance of an FD jammer-receiver, demonstrating a strong dependence on relative transmit power levels and modulation schemes.

In order to enable the simultaneous transmission and reception of wireless signals on the same frequency, a full-duplex (FD) radio must be capable of suppressing the powerful self-interference (SI) signal emitted from the transmitter and picked up by the receiver. Critically, a major bottleneck in wideband FD deployments is the need for adaptive SI cancellation (SIC) that would allow the FD wireless system to achieve strong cancellation across different settings with distinct electromagnetic environments. In this work, we evaluate the performance of an adaptive wideband FD radio in three different locations and demonstrate that it achieves strong SIC in every location across different bandwidths.

The relentless demand for data in our society has driven the continuous evolution of wireless technologies to enhance network capacity. While current deployments of 5G have made strides in this direction using massive multiple-input-multiple-output (MIMO) and millimeter-wave (mmWave) bands, all existing wireless systems operate in a half-duplex (HD) mode. Full-duplex (FD) wireless communication, on the other hand, enables simultaneous transmission and reception (STAR) of signals at the same frequency, offering advantages such as enhanced spectrum efficiency, improved data rates, and reduced latency. This article presents a comprehensive review of FD wireless systems, with a focus on hardware design, implementation, cross-layered considerations, and applications. The major bottleneck in achieving FD communication is the presence of self-interference (SI) signals from the transmitter (TX) to the receiver, and achieving SI cancellation (SIC) with real-time adaption is critical for FD deployment. The review starts by establishing a system-level understanding of FD wireless systems, followed by a review of the architectures of antenna interfaces and integrated RF and baseband (BB) SI cancellers, which show promise in enabling low-cost, small-form-factor, portable FD systems. We then discuss digital cancellation techniques, including digital signal processing (DSP)- and learning-based algorithms. The challenges presented by FD phased-array and MIMO systems are discussed, followed by system-level aspects, including optimization algorithms, opportunities in the higher layers of the networking protocol stack, and testbed integration. Finally, the relevance of FD systems in applications such as next-generation (xG) wireless, mmWave repeaters, radars, and noncommunication domains is highlighted. Overall, this comprehensive review provides valuable insights into the design, implementation, and applications of FD wireless systems while opening up new directions for future research.

$N$-path switched-$RC$circuits have been extensively investigated as a promising solution for realizing various novel functionalities, including on-chip tunable high-$Q$filters, true time delays operating beyond the delay-bandwidth product, and non-reciprocal components. The clock frequency typically sets important parameters of the functionality, such as the frequency of the filter, the amount of achievable delay etc. The ability to tune the clock frequency through a wideband synthesizer enhances the reconfigurability of$N$-path switched-$RC$circuits, but the presence of multiple independent$N$-path circuits on a chip results in the need for multiple independent wideband synthesizers. Here, we introduce a novel concept of rotary clocking in$N$-path circuits which enables us to passively frequency shift any$N$-path filter by either rotating clockwise or anti-clockwise the clocks exciting the switches of each of the paths. The effect of rotary clocking is analyzed using linear periodically-time-variant (LPTV) circuit theory, and has been verified through simulations and measurements. The effects of quantization due to finite clock phases, and the resultant spurs produced by this method, are also analyzed and compared with measurement results. Measurement results are presented for a two-port$N$-path filter implemented in a 65-nm CMOS 0.1-1 GHz highly-reconfigurable self-interference canceling receiver. The two-port filter achieves a maximum frequency shift of$f_{s}/8$in the steps of$f_{s}/160$and also has a phase control covering all of 360° in steps of 45°.

We present a set of experiments utilizing wideband real-time adaptive full-duplex (FD) radios, demonstrating simultaneous transmission and reception on the same frequency channel. Each FD radio consists of a circulator-based antenna interface, a switched-capacitor delay-line-based configurable Radio-Frequency Integrated Circuit (RFIC) that implements Self-Interference Cancellation (SIC), an FPGA that optimizes the RFIC configuration in under 1.1 sec and can adapt to environmental changes in under 0.3 sec, and a Software-Defined Radio (SDR) transmitting OFDM-like packets. We demonstrate a real-time adaptive FD radio that achieves the SIC necessary to reach the noise floor across a wide bandwidth of 50 MHz. Then, we use two FD radios to create a wireless link and showcase the superior FD throughput.

N-path commutated capacitive networks provide a practical solution to implement highly sought on-chip high-Q filtering applications in which the use of lumped inductors is undesirable due to their significant footprints and low Q-factors. Recently, it has been also revealed that N-path networks can also exhibit other interesting functionalities, such as nonreciprocal phase-shifting and ultra-wideband true time delay, providing a path to miniaturization of various reciprocal and nonreciprocal devices. The analytical treatment of these networks, however, remains challenging, because their operation involves frequency mixing produced by the time modulation. In this article, we present a highly accurate frequency-domain approach for the analysis of N-path networks based on perturbation theory. Our method compares favorably to the state-of-the-art polyphase analysis by being much simpler mathematically, yet providing results essentially indistinguishable from numerical simulations, while offering physical insights into the N-path filter operation. We particularize the solution for the high-Q operation regime and obtain simple closed-form analytical expressions for harmonic transfer functions, scattering parameters and baseband impedance.

Full-duplex (FD) wireless and phased arrays are both promising techniques that can significantly improve data rates in future wireless networks. However, integrating FD with transmit (Tx) and receive (Rx) phased arrays is extremely challenging, due to the large number of self-interference (SI) channels. Previous work relies on either RF canceller hardware or on analog/digital Tx beamforming (TxBF) to achieve SI cancellation (SIC). However, Rx beamforming (RxBF) and the data rate gain introduced by FD nodes employing beamforming have not been considered yet. We study FD phased arrays with joint TxBF and RxBF with the objective of achieving improved FD data rates. The key idea is to carefully select the TxBF and RxBF weights to achieve wideband RF SIC in the spatial domain with minimal TxBF and RxBF gain losses. Essentially, TxBF and RxBF are repurposed, thereby not requiring specialized RF canceller circuitry. We formulate the corresponding optimization problem and develop an iterative algorithm to obtain an approximate solution with provable performance guarantees. Using SI channel measurements and datasets, we extensively evaluate the performance of the proposed approach in different use cases under various network settings. The results show that an FD phased array with 9/36/72 elements can cancel the total SI power to below the noise floor with sum TxBF and RxBF gain losses of 10.6/7.2/6.9dB, even at Tx power level of 30dBm. Moreover, the corresponding FD rate gains are at least 1.33/1.66/1.68 ×.

To support experimentation with full-duplex (FD) wireless, we recently integrated two FlexICoN Gen-2 wideband FD radios in the open-access, city-scale NSF PAWR COSMOS testbed. Each integrated FD radio consists of an antenna, a customized Gen-2 RF self-interference (SI) canceller box, a USRP software-defined radio, and a remotely accessible compute node. The RF SI canceller box includes an RF canceller printed circuit board which emulates an integrated circuit implementation based on the technique of frequency-domain equalization. The Gen-2 canceller box can achieve up to 50 dB RF SI cancellation across 20MHz bandwidth. In this demo, we present the design and implementation of the open-acccess, remotely accessible FD radios that are integrated in the indoor COSMOS Sandbox 2 at Columbia University. We also demonstrate example experiments that are available to researchers, where demo participants can observe the visualized performance of the open-access FD radios.

This paper focuses on COSMOS - Cloud enhanced Open Software defined MObile wireless testbed for city-Scale deployment. The COSMOS testbed is being deployed in West Harlem (New York City) as part of the NSF Platforms for Advanced Wireless Research (PAWR) program. It will enable researchers to explore the technology "sweet spot" of ultra-high bandwidth and ultra-low latency in the most demanding real-world environment. We describe the testbed's architecture, the design and deployment challenges, and the experience gained during the design and pilot deployment. Specifically, we describe COSMOS' computing and network architectures, the critical building blocks, and its programmability at different layers. The building blocks include software-defined radios, 28 GHz millimeter-wave phased array modules, optical transport network, core and edge cloud, and control and management software. We describe COSMOS' deployment phases in a dense urban environment, the research areas that could be studied in the testbed, and specific example experiments. Finally, we discuss our experience with using COSMOS as an educational tool.

In order to support experimentation with full-duplex (FD) wireless, we integrated the FlexICoN Gen-2 wideband FD radio with the city-scale PAWR COSMOS testbed [1]. In particular, the implemented FD radio consists of an antenna, a customized Gen-2 RF self-interference (SI) canceller box, a USRP software-defined radio (SDR), and a compute node. The RF canceller box includes an RF SI canceller implemented using discrete components on a printed circuit board (PCB), which emulates its RFIC canceller counterpart. The Gen-2 RF SI canceller achieves 50dB RF SI cancellation across 20MHz bandwidth using the technique of frequency-domain equalization (FDE) [2]. In this abstract, we present the design and implementation of the remotely accessible Gen-2 wideband FD radio integrated with the COSMOS sandbox at Columbia University. We also present an example real-time wideband FD wireless link demonstration using the GNU Radio software.

Full-duplex (FD) wireless can significantly enhance spectrum efficiency but requires tremendous amount of self-interference (SI) cancellation. Recent advances in the RFIC community enabled wideband RF SI cancellation (SIC) in integrated circuits (ICs) via frequency-domain equalization (FDE), where reconfigurable RF filters are used to channelize the SI signal path. In [2], we designed and implemented an FDE-based RF canceller on a printed circuit board (PCB). We also presented an optimized canceller configuration scheme based on the derived canceller model, and extensively evaluated the performance of the FDE-based FD radios in a software-defined radio (SDR) testbed in different network settings.

Full-duplex (FD) wireless can significantly enhance spectrum efficiency but requires tremendous amount of self-interference (SI) cancellation. Recent advances in the RFIC community enabled wideband RF SI cancellation (SIC) in integrated circuits (ICs) via frequency-domain equalization (FDE), where RF filters channelize the SI signal path. Unlike other FD implementations, that mostly rely on delay lines, FDE-based cancellers can be realized in small-form-factor devices. However, the fundamental limits and higher layer challenges associated with these cancellers were not explored yet. Therefore, and in order to support the integration with a software-defined radio (SDR) and to facilitate experimentation in a testbed with several nodes, we design and implement an FDE-based RF canceller on a printed circuit board (PCB). We derive and experimentally validate the PCB canceller model and present a canceller configuration scheme based on an optimization problem. We then extensively evaluate the performance of the FDE-based FD radio in the SDR testbed. Experiments show that it achieves 95dB overall SIC (52dB from RF SIC) across 20MHz bandwidth, and an average link-level FD gain of 1.87x. We also conduct experiments in: (i) uplink-downlink networks with inter-user interference, and (ii) heterogeneous networks with half-duplex and FD users. The experimental FD gains in the two types of networks confirm previous analytical results. They depend on the users' SNR values and the number of FD users, and are 1.14x-1.25x and 1.25x-1.73x, respectively. Finally, we numerically evaluate and compare the RFIC and PCB implementations and study various design tradeoffs.

Full-duplex (FD) wireless and phased arrays are both promising techniques that can significantly improve data rates in future wireless networks. However, integrating FD with transmit (Tx) and receive (Rx) phased arrays is extremely challenging, due to the large number of self-interference (SI) channels. Previous work relies on either RF canceller hardware or on analog/digital Tx beamforming (TxBF) to achieve SI cancellation (SIC). However, Rx beamforming (RxBF) and the data rate gain introduced by FD nodes employing beamforming have not been considered yet. We study FD phased arrays with joint TxBF and RxBF with the objective of achieving improved FD data rates. The key idea is to carefully select the TxBF and RxBF weights to achieve wideband RF SIC in the spatial domain with minimal TxBF and RxBF gain losses. Essentially, TxBF and RxBF are repurposed, thereby not requiring specialized RF canceller circuitry. We formulate the corresponding optimization problem and develop an iterative algorithm to obtain an approximate solution with provable performance guarantees. Using SI channel measurements and datasets, we extensively evaluate the performance of the proposed approach in different use cases under various network settings. The results show that an FD phased array with 9/36/72 elements can cancel the total SI power to below the noise floor with sum TxBF and RxBF gain losses of 10.6/7.2/6.9 dB, even at Tx power level of 30 dBm. Moreover, the corresponding FD rate gains are at least 1.33/1.66/1.68X.

The next generation of cellular wireless communication networks (the much hyped "5G") is targeting a 1000x increase in data capacity. This has sparked an investigation of new and transformative wireless communication paradigms, including massive MIMO, full duplex and millimeter-wave wireless. These new wireless paradigms place requirements on the radio circuitry that are orders of magnitude more challenging than traditional systems, forcing us to rethink conventional radio design. Conventional analog and radio frequency circuit design has relied on linear, time-invariant (LTI) components and circuits. However, LTI components and circuits are restricted in the signal processing functionalities that can be implemented. Recently, there has been significant interest in linear, periodically time varying (LPTV) circuits that can enable new functionalities and components, such as highly-tunable, high quality integrated filters, front-ends with spatio-spectral filtering capability and integrated non-magnetic non-reciprocal components such as circulators and isolators. This paper reviews recent research breakthroughs in LPTV circuits and systems that enable full-duplex and massive MIMO wireless.

Full-duplex (FD) communication has the potential to substantially increase the throughput in wireless networks. However, the benefits of FD are still not well understood. In this paper, we characterize the FD rate gains in both single-channel and multi-channel use cases. For the single-channel case, we quantify the rate gain as a function of the remaining self-interference (SI) and signal-to-noise ratio values. We also provide a sufficient condition under which the sum of uplink and downlink rates on an FD channel is biconcave in the transmission power levels. Building on these results, we consider the multi-channel case. For that case, we introduce a new realistic model of a compact (e.g., smartphone) FD receiver and demonstrate its accuracy via measurements. We study the problem of jointly allocating power levels to different channels and selecting the frequency of maximum SI suppression, where the objective is to maximize the sum of the rates over uplink and downlink orthogonal frequency division multiplexing channels. We develop a polynomial time algorithm, which is nearly optimal, in practice, under very mild restrictions. To reduce the running time, we develop an efficient nearly optimal algorithm under the high SINR approximation. Finally, we demonstrate via numerical evaluations the capacity gains in different use cases and obtain insights into the impact of the remaining SI and wireless channel states on the performance.

A demonstration of a real-time full-duplex wireless link is presented, in which a pair of full-duplex transceivers perform simultaneous transmission and reception on the same frequency channel. A full-duplex transceiver is composed of a custom-designed small-form-factor analog self-interference canceller, and a digital self-interference cancellation implementation is integrated with the National Instruments Universal Software Radio Peripheral (USRP). An adaptive analog self-interference canceller tuning mechanism adjusts to environmental changes. We demonstrate the practicality and robustness of the full-duplex wireless link through the National Instruments LabVIEW interface.

Over the past decade, we have witnessed the maturation of silicon-based phased array technology, which has started to make an impact on commercial and military wireless applications. Over the next decade, driven by the development of next-generation wireless communication networks, we will see the maturation and impact of large-scale multiple-input-multiple-output (MIMO) technology. MIMO receiver arrays exploit digital array signal processing, and consequently are exposed to interference in the analog and radio-frequency (RF) front ends. The absence of analog/RF interference mitigation in traditional digital MIMO receiver arrays results in designs with high-dynamic-range and power-hungry analog and RF receiver front ends and analog-to-digital converters. This paper describes recently developed techniques for spatio-spectral interference mitigation in the analog and RF domain for digital MIMO receivers. The techniques proposed are flexible; tunable across operating frequency; scalable; present low cost, size, and power consumption overheads; and are experimentally validated through a 0.1-1.7-GHz four-element receiver front-end array integrated circuit (IC) prototype in 65-nm complementary metal-oxide-semiconductor (CMOS) technology.

Full-duplex communication has the potential to substantially increase the throughput in wireless networks. However, the benefits of full-duplex are still not well understood. In this paper, we characterize the full-duplex rate gains in both single-channel and multi-channel use cases. For the single-channel case, we quantify the rate gain as a function of the remaining self-interference and SNR values. We also provide a sufficient condition under which the sum of uplink and downlink rates on a full-duplex channel is concave in the transmission power levels. Building on these results, we consider the multi-channel case. For that case, we introduce a new realistic model of a small form-factor (e.g., smartphone) full-duplex receiver and demonstrate its accuracy via measurements. We study the problem of jointly allocating power levels to different channels and selecting the frequency of maximum self-interference suppression, where the objective is maximizing the sum of the rates over uplink and downlink OFDM channels. We develop a polynomial time algorithm which is nearly optimal under very mild restrictions. To reduce the running time, we develop an efficient nearly-optimal algorithm under the high SINR approximation. Finally, we demonstrate via numerical evaluations the capacity gains in the different use cases and obtain insights into the impact of the remaining self-interference and wireless channel states on the performance.

RF self-interference cancellation (SIC) relaxes duplexer isolation requirements in frequency- division-duplex (FDD) radios, enabling compact/tunable duplexers. RF SIC is also critical for full-duplex radios where extremely-high levels of SIC must be achieved, necessitating SIC at various points in the receiver chain. While active RF SIC is potentially compact and highly reconfigurable, the use of active circuitry in the canceller introduces noise, distortion and power dissipation challenges. Furthermore, and particularly for fully-integrated silicon-based SIC implementations, the bandwidth (BW) of RF SIC is limited by the frequency selectivity of the antenna interface and the wireless self-interference channel. In this paper, we present recent developments in fully-integrated RF SIC techniques that address these challenges.

Previous analytical efforts to incorporate the impact of finite switch ON-resistance into the design procedure of Class-E power amplifiers (PAs) have imposed one or both of the so-called “Class-E switching conditions”, namely zero voltage switching (ZVS) and zero derivative of voltage at switching (ZDVS). These are essential for high efficiency operation only in the absence of losses. In this work, more general design equations have been derived without imposition of either ZVS or ZDVS. The optimal design is found to exhibit neither ZVS nor ZDVS, thereby validating the analysis. For the first time, an attempt has been made to incorporate the input power into the analysis, which facilitates optimization of power-added efficiency (PAE). The resulting designs exhibit better performance in terms of output power and PAE compared to existing design approaches. The analytical results have been verified through Spectre-RF simulations at 5GHz in 0.18µm and 65nm CMOS. Through this design procedure, we further demonstrate that Class-E PAs at 5GHz based on thick-oxide devices in 0.18µm CMOS, despite their lower speed, outperform those based on 65nm CMOS devices due to their higher voltage-handling capability.