A unique family of high-speed, microprogrammable asynchronous controller (MAC) modules is described in this correspondence. Each MAC module consists of two fundamental mode machines that communicate by means of a handshake interface that permits it to be driven by any programmable logic device including ROM's. Any state machine controller designed with a MAC module will operate free of critical races, essential hazards and output race glitches, and will have static hazard-free state variables. A multiplicity of programmable logic devices can be used to drive one or more MAC modules to achieve complex, but reliable, asynchronous, time-shared and/or parallel processing of data. Individual MAC modules having state variables numbering l,m,n,...can be cascaded to produce an available system state capacity of 2/sup lspl times/2/sup mspl times/2/sup nspl times/...states with up to (l+m+n+...)-way transition capability, all without compromising speed or reliability.>