If the Internet is to operate reliably, it is important to verify whether the routing information about an autonomous system (AS) is correctly spread throughout the Internet as the originating AS intends or not. Because the routing information changes as it spreads, it is necessary for the inter-AS diagnostic system to observe the routing information from outside the AS. Each AS is controlled by a single administrative authority based on that AS's own policy, so a cooperative distributed solution is desirable. To cope with these requirements, we have proposed a multi-agent-based inter-AS diagnostic system called ENCORE, where a collection of intelligent agents are located in multiple AS and perform collective observation and analysis. This paper describes its diagnostic functions. It focuses on the agents' autonomous observation actions and their ability to perform cooperative and efficient analysis of routing anomalies. We also discuss the effectiveness and limitations of ENCORE based on analysis of a real AS.

The cooperative action between RSVP and some protocols performed on ATM networks, is one of problems that should be solved to provide integrated services over ATM networks discussed in IETF. In this paper, after describing some schemes that map RSVP into these protocols to reserve resources over ATM networks, we compare these schemes and point out some problems therein. Next, we propose a new approach referred to as "the direct lookup approach" to improve these schemes. The new approach removes overhead by the mapping between RSVP and protocols performed on ATM networks, and control messages of RSVP on ATM networks are directly examined. Finally, we discuss some issues for the implementation of this new approach.

Microprogramming is a basic technique that realizes functionally specialized processors in a functionally distributed multiprocessor system which consists of many small processors. In such a multiprocessor system, it is necessary to change processor functions dynamically in order to back up a heavily loaded processor or a failed processor by a lightly loaded processor. This paper proposes a mechanism for exchanging processor functions in firmware level and shows a hardware organization which realizes the mechanism in an experimental system. In order to clarify the design conditions of an operating system and microprograms, the performance of the mechanism is analyzed from the load balancing point of view. Moreover, the conditions which the mechanism must satisfy are derived.

This paper discusses the design of interconnection modules for a multiprocessor system which consists of many small and functionally specialized processors. It is proposed that the information, i.e. programs, data etc., used in the system should be divided into three categories; private information, command data and shared data, according to the analysis of software simulation results. Private information is stored in a memory provided exclusively for each processor. Command data is transferred directly between processors to initiate a function in other processors. Shared data is stored in a memory shared by several processors. For command data and shared data, two different connection modules are provided; the interprocessor connection module using common bus technique, and the processor-memory connection module using crossbar switch technique. The effects of information partitioning on the performance and cost of the system are analyzed. It is verified that the interprocessor connection module technique is preferable than a few possible alternatives through the design analysis and the implementation of a pilot model system.

This paper discusses the structure and efficiency of a computer complex constructed of many small, tightly coupled, functionally dedicated processors called a Poly-Processor System (PPS). The objective of the PPS is to realize a computer system which has easier expandability, higher reliability and better cost-to-performance ratio than existing systems.