This special issue presents a variety of invited papers covering nanostructures and related materials proposed to extend CMOS scaling to its ultimate limit and enable a variety of new logic and memory devices.

This paper will outline some results obtained by an international working group on nanoelectronics, which collects data from major publicly funded programs in Europe, Japan, and the United States on long-term nanoelectronics research. It maps these programs and projects onto a set of research directions that are expected to drive nanoelectronics for the long term. The purpose is to identify those research topics attracting a lot of attention and those important topics that seem less attractive. This paper will give examples of interregional collaborative programs and identify sources of funding specifically provided to support international collaborations.

In this paper we consider device scaling and speed limitations on irreversible von Neumann computing that are derived from the requirement of "least energy computation." We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.