Many applications make use of the edge devices in wireless sensor networks (WSNs), including video surveillance, traffic monitoring and enforcement, personal and health care, gaming, habitat monitoring, and industrial process control. However, these edge devices are resource-limited embedded systems that require a low-cost, low-power, and high-performance encryption/decryption solution to prevent attacks such as eavesdropping, message modification, and impersonation. This paper proposes a field-programmable gate array (FPGA) based design and implementation of the Advanced Encryption Standard (AES) algorithm for encryption and decryption using a parallel-pipeline architecture with a data forwarding mechanism that efficiently utilizes on-chip memory modules and massive parallel processing units to support a high throughput rate. Hardware designs that optimize the implementation of the AES algorithm are proposed to minimize resource allocation and maximize throughput. These designs are shown to outperform existing solutions in the literature. Additionally, a rapid prototype of a complete system-on-chip (SoC) solution that employs the proposed design on a configurable platform has been developed and proven to be suitable for real-time applications.

Solid-state drives (SSDs) are pervasive in modern computing and have supplanted hard disk drives in many applications. Substantial changes in architecture have brought about not only improvements in speed and energy usage but also new security concerns. The presence of proprietary firmware onboard SSD controllers in particular raises the possibility that data believed by a user or operating system to be deleted physically remains on the drive and can thus be recovered. This security issue has a direct application to malware detection, digital forensics, and consumer privacy. To begin to address this, we propose a novel, noninvasive side-channel approach to infer the SSD trim operation. We demonstrate that it is possible to infer the trim operation with better than 99% accuracy using current probe measurements in conjunction with machine learning techniques. We find that the sampling frequency can be reduced to 200 kSps while maintaining greater than 80% of the total power in the 0-1 MHz band. The classifier accordingly uses only information in the frequency range between 0 and 100 kHz in achieving its high accuracy. We also validate our current probe measurement technique by comparing it with an in-line resistor.

In this paper, we propose and implement a novel covert channel for wireless networks employing the IEEE 802.11 standard. This timing-based covert channel trades off data rate to provide a covert channel that is detectable only at the physical layer (layer 1) and is compatible with all off-the-shelf versions of the current standard. Information is embedded in the interarrival times of probe request frames or beacon frames and data rates in excess of 50 bps with observed symbol error rates of less than 2% and 6.25% in a controlled environment and uncontrolled environment respectively.

In this paper, we formally introduce the novel concept of traffic-adaptive, flow-specific medium access control and show that it outperforms contention, non-contention and hybrid medium access schemes. A traffic-adaptive, flow-specific mechanism is proposed that utilizes flow-specific queue size statistics to select between medium access modes. A general model for traffic-adaptive, flow-specific medium access control is developed and it is shown that hybrid medium access as well as traditional contention-based and non-contention schemes can be seen as special cases of the more general flow-specific access. The proposed traffic-adaptive, flow-specific mechanism is applied to Cooperative Wireless Sensor Network Medium Access Control (CWS-MAC) to provide representative simulation results.