VLDB 2026 Research / reviewers in the wild / expert
Savina Bansal
dblp:02/2711
· DBLP profile ↗
12ranked-venue papers
7as first author
6since 2021 · last 2026
0000-0001-7483-1841ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 6 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 5 · 1 first-author · 5 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 61% Electronic design automation · 30% Interconnection networks and networks-on-chip · 9% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › task scheduling › task graph scheduling
duplication-based scheduling |
0.0 | 1 | 2003 | An Improved Duplication Strategy for Scheduling Precedence Constrained Graphs in Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 2003 |
Electronic design automation › high-level synthesis
scheduling |
0.0 | 1 | 2003 | An Improved Duplication Strategy for Scheduling Precedence Constrained Graphs in Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 2003 |
Parallel and multicore computing › task scheduling
task graph scheduling |
0.0 | 1 | 2003 | An Improved Duplication Strategy for Scheduling Precedence Constrained Graphs in Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 2003 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0duplication heuristic · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Dealing with downward recompression for robust steganography in high quality JPEG images
Savina Bansal, R. K. Bansal |
J. Vis. Commun. Image Represent. | 2 |
| 2026 | MRAS: A matching robust adaptive steganography scheme for JPEG images over social networking platforms
Savina Bansal, R. K. Bansal |
Signal Process. | 2 |
| 2025 | Downward recompression robust JPEG steganography via efficient content-adaptive embedding
Savina Bansal, R. K. Bansal |
Multim. Tools Appl. | 2 |
| 2024 | A novel low complexity retinex-based algorithm for enhancing low-light images
Savina Bansal, Rakesh Kumar Bansal, Rahul Bhardwaj |
Multim. Tools Appl. | 1 |
| 2021 | Energy efficient backup overloading schemes for fault tolerant scheduling of real-time tasks
Savina Bansal, Rakesh Kumar Bansal, Kiran Arora |
J. Syst. Archit. | 1 |
| 2021 | Image steganography for securing secret data using hybrid hiding model
Sumeet Kaur, Savina Bansal, Rakesh Kumar Bansal |
Multim. Tools Appl. | 2 |
| 2020 | Energy-cognizant scheduling for preference-oriented fixed-priority real-time tasks
Savina Bansal, Rakesh Kumar Bansal, Kiran Arora |
J. Syst. Archit. | 1 |
| 2017 | Duplication-controlled static energy-efficient scheduling on multiprocessor computing systemabstractSummary Energy‐efficient scheduling is a step towards meeting green computing requirements. The work in this direction mainly aims at reducing dynamic energy consumption that includes clock gating, cache subbanking, and dynamic voltage and frequency scaling of underlying processors. However, the emergence of fast and compact transistor sizes has exponentially added onto the processor static power consumption, which has not been paid much attention. This article proposes a duplication‐controlled static energy‐efficient scheduling (C‐SEED) algorithm for scheduling precedence constrained applications on parallel computing systems. The C‐SEED algorithm couples adaptive threshold‐based duplication with system level dynamic power management technique to achieve its objectives. Dynamic power management works by selectively putting the energy‐consuming resources to efficient low‐power states for idle times to reduce energy consumption. Efficacy of the proposed algorithm is analyzed and compared against other relevant works on the basis of makespan and total energy (dynamic + static + communication) consumption. The extensive simulation results carried over large set of random and regular task graphs show that the proposed C‐SEED algorithm has potential to reduce energy consumption as well as makespan. Nirmal Kaur, Savina Bansal, Rakesh Kumar Bansal |
Concurr. Comput. Pract. Exp. | 2 |
| 2006 | An improved two-step algorithm for task and data parallel scheduling in distributed memory machines
Savina Bansal, Padam Kumar |
Parallel Comput. | 1 |
| 2005 | Dealing with heterogeneity through limited duplication for scheduling precedence constrained task graphs
Savina Bansal, Padam Kumar |
J. Parallel Distributed Comput. | 1 |
| 2003 | An Improved Duplication Strategy for Scheduling Precedence Constrained Graphs in Multiprocessor SystemsabstractScheduling precedence constrained task graphs, with or without duplication, is one of the most challenging NP-complete problems in parallel and distributed computing systems. Duplication heuristics are more effective, in general, for fine grain task graphs and for networks with high communication latencies. However, most of the available duplication algorithms are designed under the assumption of unbounded availability of fully connected processors, and lie in a high complexity range. Low complexity optimal duplication algorithms work under restricted cost and/or shape parameters for the task graphs. Further, the required number of processors grows in proportion to the task-graph size significantly. An improved duplication strategy is proposed that works for arbitrary task graphs, with a limited number of interconnection-constrained processors. Unlike most other algorithms that replicate all possible parents/ancestors of a given task, the proposed algorithm tends to avoid redundant duplications and duplicates the nodes selectively, only if it helps in improving the performance. This results in lower duplications and also lower time and space complexity. Simulation results are presented for clique and an interconnection-constrained network topology with random and regular benchmark task graph suites, representing a variety of parallel numerical applications. Performance, in terms of normalized schedule length and efficiency, is compared with some of the well-known and recently proposed algorithms. The suggested algorithm turns out to be most efficient, as it generates better or comparable schedules with remarkably less processor consumption. Savina Bansal, Padam Kumar |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2002 | Duplication-Based Scheduling Algorithm for Interconnection-Constrained Distributed Memory Machines
Savina Bansal, Padam Kumar |
HiPC | 1 |