Gérard Blanchet

dblp:02/2894 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault detection
0.011976
About Random Fault Detection of Combinational Networks · IEEE Trans. Computers 1976
Electronic design automation
hardware verification and test
0.011976
About Random Fault Detection of Combinational Networks · IEEE Trans. Computers 1976
Electronic design automation › hardware verification and test
random testing
0.011976
About Random Fault Detection of Combinational Networks · IEEE Trans. Computers 1976

Methods — techniques the papers use, named apart from their topics

random input sequence testing · 0.0detection surface analysis · 0.0
YearPublicationVenuePosition
1976 About Random Fault Detection of Combinational Networks
abstract
Fault detection by applying a random input sequence simultaneously to a network under test and to a reference network is conside-red. A distinction between testing quality and detection quality is given. The detection surface is introduced as a characteristic parameter of a combinational network. The results are applied to TTL combinational circuits.
René David, Gérard Blanchet
IEEE Trans. Computers2