Demo Data from VLDB 2026 / reviewers in the wild / expert
George Epstein
dblp:02/3670
· DBLP profile ↗
11ranked-venue papers
9as first author
0since 2021 · last 1989
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 4 · 4 first-authorArtificial intelligence and machine learning · 3 · 2 first-authorSystems, architecture and hardware · 3 · 3 first-authorDatabases, data management, data science and information retrieval · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
3 papers |
Logic in computer science · 55% Information theory · 26% Algorithmic game theory and mechanism design · 12% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 69% Electronic design automation · 31% |
Topics — the 10 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Information theory › signal processing
filtering |
0.0 | 2 | 1971 | A Note on the Derivation of Finite-Memory Almost-Least-Squares Recursive Filters · IEEE Trans. Inf. Theory 1971 On finite-memory recursive filters (Corresp.) · IEEE Trans. Inf. Theory 1970 |
Logic in computer science
algebraic logic |
0.0 | 1 | 1973 | An Equational Axiomatization for the Disjoint System of Post Algebras · IEEE Trans. Computers 1973 |
Logic in computer science › algebraic logic › equational logic
equational axiomatization |
0.0 | 1 | 1973 | An Equational Axiomatization for the Disjoint System of Post Algebras · IEEE Trans. Computers 1973 |
Logic in computer science › algebraic logic
post algebras |
0.0 | 1 | 1973 | An Equational Axiomatization for the Disjoint System of Post Algebras · IEEE Trans. Computers 1973 |
Algorithmic game theory and mechanism design › solution concepts in games › equilibrium concepts
stability |
0.0 | 1 | 1970 | On finite-memory recursive filters (Corresp.) · IEEE Trans. Inf. Theory 1970 |
Mathematical optimization
least squares |
0.0 | 2 | 1971 | A Note on the Derivation of Finite-Memory Almost-Least-Squares Recursive Filters · IEEE Trans. Inf. Theory 1971 On finite-memory recursive filters (Corresp.) · IEEE Trans. Inf. Theory 1970 |
Integrated circuit design
digital circuit design |
0.0 | 2 | 1962 | Single Function Shifting Counters · J. ACM 1962 Synthesis of Electronic Circuits for Symmetric Functions · IRE Trans. Electron. Comput. 1958 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1958 | Synthesis of Electronic Circuits for Symmetric Functions · IRE Trans. Electron. Comput. 1958 |
Integrated circuit design › digital circuit design
sequential circuit design |
0.0 | 1 | 1962 | Single Function Shifting Counters · J. ACM 1962 |
Electronic design automation › logic synthesis › boolean function realization
symmetric function synthesis |
0.0 | 1 | 1958 | Synthesis of Electronic Circuits for Symmetric Functions · IRE Trans. Electron. Comput. 1958 |
Methods — techniques the papers use, named apart from their topics
least-squares estimation · 0.0equational logic · 0.0disjoint operators · 0.0minimal-not condition · 0.0logic design · 0.0fold-down method · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1989 | Fifth Southeastern Logic Symposium
George Epstein |
J. Symb. Log. | 1 |
| 1988 | Thresholds for Certainty and the Modal Logic S3
George Epstein |
IPMU | 1 |
| 1987 | Approximation Reasoning and Scott's Information Systems
Helena Rasiowa, George Epstein |
ISMIS | 2 |
| 1986 | Memory length as a feedback parameter in learning systemsabstractIn a classic learning experiment, a higher vertebrate is presented with two levers. To start, a reward is given if the left lever is pushed, no reward is given if the right lever is pushed. After a certain period of time, T, the meaning of the two levers is interchanged. Now a reward is given if the right lever is pushed and no reward is given if the left lever is pushed. This happens for the same period of time T. Once again there is an interchange in the meaning of the two levers for the period of time T. This alternation is repeated a number of times. George Epstein |
ISMIS | 1 |
| 1973 | An Equational Axiomatization for the Disjoint System of Post AlgebrasabstractIt is shown that the class of Post algebras of finite order n is equationally definable where the only unary operators are the disoint operators Ci, i = 0, 1,..., n -1. George Epstein |
IEEE Trans. Computers | 1 |
| 1973 | Comments on "The Relationship Between Multivalued Switching Algebra and Boolean Algebra Under Different Definitions of Complement"abstractThis correspondence identifies the definitions of the above paper in mathematical terms. Both algebraic and logical terms are given. George Epstein |
IEEE Trans. Computers | 1 |
| 1971 | Comments on 'On Finite-Memory Recursive Filters'
George Epstein |
IEEE Trans. Inf. Theory | 1 |
| 1971 | A Note on the Derivation of Finite-Memory Almost-Least-Squares Recursive Filters
George Epstein |
IEEE Trans. Inf. Theory | 1 |
| 1970 | On finite-memory recursive filters (Corresp.)abstractIt has not been noted in the literature that finite-memory least-squares, recursive filters are unstable, and hence unsuited for a large number of recursions. This correspondence modifies the finite-memory least-squares recursive filters to allow for stable solutions. George Epstein |
IEEE Trans. Inf. Theory | 1 |
| 1962 | Single Function Shifting Countersabstractarticle Free AccessSingle Function Shifting Counters Authors: John S. Bailey Gilfillan Corporation, Los Angeles, California Gilfillan Corporation, Los Angeles, CaliforniaView Profile , George Epstein Gilfillan Corporation, Los Angeles, California Gilfillan Corporation, Los Angeles, CaliforniaView Profile Authors Info & Claims Journal of the ACMVolume 9Issue 3July 1962 pp 375–378https://doi.org/10.1145/321127.321134Published:01 July 1962Publication History 4citation277DownloadsMetricsTotal Citations4Total Downloads277Last 12 Months3Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF John S. Bailey, George Epstein |
J. ACM | 2 |
| 1958 | Synthesis of Electronic Circuits for Symmetric FunctionsabstractThis paper develops a systematic method for the synthesis of electronic circuits which must realize symmetric Boolean functions. The ``fold-down'' method, originated by Shannon [1], solves the problem nicely for relay circuits. The electronic circuit, however, composed of ``and,'' ``or,'' and ``not'' elements, does not seem to incorporate the feature of symmetry as readily. It is shown that for symmetric functions a minimal-not condition exists, and that this form is a powerful tool for synthesis. The minimality is not actually proven, except for the case of fundamental symmetric functions. As with the minimal-or circuit, a minimal-not circuit does not necessarily imply the most economical realization, and the design procedure should take account of this fact. George Epstein |
IRE Trans. Electron. Comput. | 1 |