Understanding how to reproduce robust and reliable decision making behavior in neuromorphic systems can be useful for developing information processing architectures in subthreshold analog circuits as well as future emerging nano-technologies, that comprise inhomogeneous and unreliable components. To this end, we explore the computational properties of a recurrent neural network, implemented in a custom mixed signal analog/digital neuromorphic chip, for realizing perceptual decision-making, bi-stable perception, and working memory. The chip comprises conductance-based integrate-and-fire neurons and configurable synapses with realistic dynamics. These circuits are configured to implement a recurrent neural network, composed of excitatory and inhibitory pools of silicon neurons coupled with local excitation and global inhibition. We show how the interplay between excitation and inhibition produces competitive winner-take-all dynamics, which is a feature of decision-making and persistent activity models, and demonstrate that the system generates reliable dynamics capable of reproducing both neuro-physiological data and psycho-physical performances in coding and collective distributed computation.

We describe and demonstrate the implementation of attractor neural network dynamics in analog VLSI chips [1]. The on-chip network is composed of an excitatory and an inhibitory population of recurrently connected linear integrate-and-fire neurons. Besides the recurrent input these two populations receive external input in the form of spike trains from an Address-Event-Representation (AER) based system. External AER input stimulates the attractor network and provides also an adequate background activity for the on-chip populations. We use the mean-field approximation of a model attractor neural network to identify regions of parameter space allowing for attractor states, matching hardware constraints. Consistency between theoretical predictions and the observed collective behaviour of the network on chip is checked using the ‘effective transfer function’ (ETF) [2]. We demonstrate that the silicon network can support two equilibrium states of sustained firing activity that are attractors of the dynamics, and that external stimulation can provoke a transition from the lower to the higher state.

We describe the implementation and illustrate the learning performance of an analog VLSI network of 32 integrate-and-fire neurons with spike-frequency adaptation and 2016 Hebbian bistable spike-driven stochastic synapses, endowed with a self-regulating plasticity mechanism, which avoids unnecessary synaptic changes. The synaptic matrix can be flexibly configured and provides both recurrent and external connectivity with address-event representation compliant devices. We demonstrate a marked improvement in the efficiency of the network in classifying correlated patterns, owing to the self-regulating mechanism.

We describe and demonstrate the key features of a neu- romorphic, analog VLSI chip (termed F-LANN) hosting 128 integrate-and-fire (IF) neurons with spike-frequency adap- tation, and 16 384 plastic bistable synapses implementing a self-regulated form of Hebbian, spike-driven, stochastic plasticity. We were successfully able to test and verify the basic operation of the chip as well as its main new fea- ture, namely the synaptic configurability. This configura- bility enables us to configure each individual synapse as either excitatory or inhibitory and to receive either recur- rent input from an on-chip neuron or AER (Address Event Representation)-based input from an off-chip neuron. It's also possible to set the initial state of each synapse as po- tentiated or depressed, and the state of each synapse can be read and stored on a computer. The main aim of this chip is to be able to efficiently perform associative learning ex- periments on a large number of synapses. In the future we would like to connect up multiple F-LANN chips together to be able to perform associative learning of natural stimulus sets.

We summarize the implementation of an analog VLSI chip hosting a network of 32 integrate-and-fire (IF) neurons with spike-frequency adaptation and 2,048 Hebbian plastic bistable spike-driven stochastic synapses endowed with a self-regulating mechanism which stops unnecessary synaptic changes. The synaptic matrix can be flexibly configured and provides both recurrent and AER-based connectivity with external, AER compliant devices. We demonstrate the ability of the network to efficiently classify overlapping patterns, thanks to the self-regulating mechanism.

We illustrate key features of an analog, VLSI (aVLSI) chip implementing a network composed of 32 integrate-and-fire (IF) neurons with firing rate adaptation (AHP current), endowed with both a recurrent synaptic connectivity and AER-based connectivity with external, AER-compliant devices. Synaptic connectivity can be reconfigured at will as for the presence/absence of each synaptic contact and the excitatory/inhibitory nature of each synapse. Excitatory synapses are plastic through a spike-driven stochastic, Hebbian mechanism, and possess a self-limiting mechanism aiming at an optimal use of synaptic resources for Hebbian learning