Blockchain technology has revolutionized numerous industries by providing decentralized, transparent, and immutable ledgers. However, its adoption is hindered by persistent security challenges, including arbitrage attacks, liquidity exploits, and noncompliance with antimoney laundering (AML) regulations. This paper proposes an enhanced framework to address these issues, combining dynamic pricing mechanisms, AI‐based anomaly detection, and regulatory compliance checks within a multilayered architecture. The framework is composed of five interconnected layers: the input layer for data collection and validation, the data warehouse layer for structured data classification, the processing layer for anomaly detection and pricing adjustments, and the decision layer for transaction validation, execution, and reporting. The integration of these layers ensures robust security and compliance mechanisms, reducing system vulnerabilities while optimizing efficiency. To validate the proposed framework, we conducted simulations using real‐world blockchain scenarios, including decentralized finance (DeFi) platforms and cryptocurrency exchanges. Results demonstrate significant reductions in arbitrage opportunities and liquidity risks, with improved accuracy in anomaly detection and compliance adherence. For instance, the dynamic pricing mechanism mitigated 87% of arbitrage attack attempts, while the AI‐based anomaly detection achieved an 89% accuracy rate in identifying high‐risk transactions. This study provides actionable insights and a scalable solution for enhancing blockchain security and trust. Future work will focus on integrating cross‐chain interoperability, real‐time threat intelligence, and privacy‐preserving techniques to further expand the framework’s applicability. By addressing critical vulnerabilities, this research contributes to the development of secure, transparent, and compliant blockchain ecosystems, paving the way for wider adoption across industries. Unlike previous blockchain security models, our framework introduces a real‐time, AI‐enhanced risk assessment mechanism that dynamically updates transaction risk scores, mitigating financial threats in decentralized environments. This holistic approach provides a scalable, explainable, and adaptive security system that not only protects decentralized financial infrastructures but also aligns with emerging regulatory requirements, ensuring long‐term applicability.

Abstract The number of Internet-of-Things (IoT) devices has been increasing rapidly every year. Most of these devices have access to important personal data such as health, daily activities, location, and finance. However, these devices have security problems since they have limited processing power and memory to implement complex security measures. Therefore, they possess weak authentication mechanisms and a lack of encryption. Additionally, there are no widely accepted standards for IoT security. Device Identifier Composition Engine (DICE) was proposed as a standard that enables adding a security layer to low-cost microcontrollers with minimal silicon overhead. However, previous studies show that DICE-based attestation is vulnerable to some remote attacks. In this study, we present a novel method called DICEguard to address the security problems of DICE. One of the key innovations of DICEguard is its incorporation of periodic memory forensics (PMF) technique, leveraging a hardware-based hash engine to detect and mitigate potential security breaches resulting from firmware vulnerabilities. DICEguard enhances the overall resilience of IoT devices against attacks by swiftly detecting alterations indicative of malicious activity through periodic calculation and comparison of firmware digests. Furthermore, DICEguard introduces a one-time programmable (OTP) memory component to safeguard critical security parameters, such as public keys used for signature verification, against tampering by adversaries. This ensures the integrity of essential security measures even in the face of sophisticated attacks. We implemented the enhanced DICE architecture using the open-source RISC-V platform Ibex and the mbedTLS library for cryptographic operations. We performed the hash operations required by DICE in a hardware-based manner on a commercial Field Programmable Gate Array (FPGA) platform rather than firmware, which is more vulnerable to attacks. Our test results show that with negligible area overhead to a standard microcontroller system, the proposed method can detect the simulated attacks.

It is an undeniable fact that currently information is a pretty significant presence for all companies or organizations. Therefore protecting its security is crucial and the security models driven by real datasets has become quite important. The operations based on military, government, commercial and civilians are linked to the security and availability of computer systems and network. From this point of security, the network security is a significant issue because the capacity of attacks is unceasingly rising over the years and they turn into be more sophisticated and distributed. The objective of this review is to explain and compare the most commonly used datasets. This paper focuses on the datasets used in artificial intelligent and machine learning techniques, which are the primary tools for analyzing network traffic and detecting abnormalities.

We present the results of our implementation of elliptic curve cryptography (ECC) over the field GF(p) on an 80-MHz, 32-bit ARM microprocessor. We have produced a practical software library which supports variable length implementation of the elliptic curve digital signature algorithm (ECDSA). We implemented the ECDSA and a recently proposed ECC-based wireless authentication protocol using the library. Our timing results show that the 160-bit ECDSA signature generation and verification operations take around 46 ms and 94 ms, respectively. With these timings, the execution of the ECC-based wireless authentication protocol takes around 140 ms on the ARM7TDMI processor, which is a widely, used, low-power core processor for wireless applications.