A relation between fault coverage and testability is employed to predict population coverage. The testability profile is modeled as a mixture of a discrete impulse function and a continuous beta distribution. The parameters of the modeled distribution are estimated from fault coverage data obtained on a sample of faults. The beta distribution is chosen due to its flexible nature. The computed values of the beta parameters are dependent on the distribution of input vectors. Experimental results on three of the large ISCAS-89 circuits reflect the accuracy of the estimated fault coverage. Applications of the presented work include test generation by fault sampling, testability estimation, and test length predictions.>

The authors present a new method of estimating the testability profile of a circuit from its random fault coverage data. They have recently developed a relationship between fault coverage and testability profile. However, their testability profile estimates were based on unknown distribution of input vectors and used Bayes theorem with a priori uniform detection probability distribution. The testability profile is modeled as a series of impulse functions and the strength of each estimated from fault coverage data. Experimental results given on three of the large ISCAS benchmark circuits reflect the accuracy of these estimates. Applications include: coverage prediction from testability analysis, prediction of test length, and test generation by fault sampling.>

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A relation between the average fault coverage and circuit testability is developed. The statistical formulation allows computation of coverage for deterministic and random vectors. The following applications of this analysis are discussed: determination of circuit testability from fault simulation, coverage prediction from testability analysis, prediction of test length, and test generation by fault sampling.>

The authors present a novel technique of generating tests from a random sample of faults. The entire fault population of the circuit is randomly divided into two groups. Only one group, usually the smaller one, is used for test generation by the test-generator and fault-simulator programs. This group is known as the sample and its coverage is deterministic. The coverage of faults in the remaining group is similar to that of random vectors and is estimated from the distribution of fault detection probabilities in the circuit. As the sample size increases, the fraction of unsampled faults reduces. At the same time, a larger sample yields more test vectors to increase the random coverage. For a circuit with high testability, a sample of just 5% faults, will provide tests for a 95% coverage. On the other hand, for a circuit with a relatively poor testability, one may have to sample 33% faults for the same coverage. For most practical cases, the sampling approach will mean significant saving in the computation and storage needs of fault simulation.>