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George E. Rossman

dblp:03/3035 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1977
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › pipelining
instruction pipeline		 0.011977
The Effect of Instruction Fetch Strategies upon the Performance of Pipelined Instruction Units · ISCA 1977
Processor architecture and microarchitecture › pipelining
pipeline performance		 0.011977
The Effect of Instruction Fetch Strategies upon the Performance of Pipelined Instruction Units · ISCA 1977
YearPublicationVenuePosition
1977 The Effect of Instruction Fetch Strategies upon the Performance of Pipelined Instruction Units
Bob Rau, George E. Rossman
 ISCA2