Demo Data from VLDB 2026 / reviewers in the wild / expert
Kenneth J. Supowit
dblp:03/4374
· DBLP profile ↗
27ranked-venue papers
12as first author
0since 2021 · last 1990
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 13 · 6 first-authorSystems, architecture and hardware · 9 · 5 first-authorDatabases, data management, data science and information retrieval · 3 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 1 first-authorComputer networks · 1Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
14 papers |
Computational geometry · 34% Mathematical optimization · 22% Graph algorithms and graph theory · 19% | |
| Computer architecture, parallel and distributed computing, and storage systems
9 papers |
Electronic design automation · 99% Integrated circuit design · 1% |
Topics — the 30 heaviest of 46, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
physical design |
0.0 | 5 | 1987 | Finding a Maximum Planar Subset of a Set of Nets in a Channel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 A Hierarchy-Driven Amalgamation of Standard and Macro Cells · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1984 Placement algorithms for custom VLSI · DAC 1983 |
Electronic design automation › logic synthesis › decision diagrams
binary decision diagram |
0.0 | 2 | 1990 | Finding the Optimal Variable Ordering for Binary Decision Diagrams · IEEE Trans. Computers 1990 Finding the Optimal Variable Ordering for Binary Decision Diagrams · DAC 1987 |
Electronic design automation
logic synthesis |
0.0 | 2 | 1990 | Finding the Optimal Variable Ordering for Binary Decision Diagrams · IEEE Trans. Computers 1990 Finding the Optimal Variable Ordering for Binary Decision Diagrams · DAC 1987 |
Mathematical optimization
combinatorial optimization |
0.0 | 3 | 1990 | Finding a Maximum Planar Subset of a Set of Nets in a Channel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 Simulated Annealing Without Rejected Moves · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 Finding the Optimal Variable Ordering for Binary Decision Diagrams · IEEE Trans. Computers 1990 |
Electronic design automation › logic synthesis
variable ordering |
0.0 | 1 | 1990 | Finding the Optimal Variable Ordering for Binary Decision Diagrams · IEEE Trans. Computers 1990 |
Computational geometry › proximity problems
dynamic closest pair |
0.0 | 1 | 1990 | New Techniques for Some Dynamic Closest-Point and Farthest-Point Problems · SODA 1990 |
Electronic design automation › physical design
routing |
0.0 | 2 | 1987 | Finding a Maximum Planar Subset of a Set of Nets in a Channel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 A minimum-impact routing algorithm · DAC 1982 |
Graph algorithms and graph theory
graph decomposition |
0.0 | 1 | 1989 | Recognizing circle graphs in polynomial time · J. ACM 1989 |
Graph algorithms and graph theory › graph classes
graph recognition |
0.0 | 1 | 1989 | Recognizing circle graphs in polynomial time · J. ACM 1989 |
Algorithms and data structures
heuristic algorithms |
0.0 | 2 | 1983 | The Travelling Salesman Problem and Minimum Matching in the Unit Square · SIAM J. Comput. 1983 Divide and Conquer Heuristics for Minimum Weighted Euclidean Matching · SIAM J. Comput. 1983 |
Algorithmic game theory and mechanism design
matching |
0.0 | 2 | 1983 | The Travelling Salesman Problem and Minimum Matching in the Unit Square · SIAM J. Comput. 1983 Divide and Conquer Heuristics for Minimum Weighted Euclidean Matching · SIAM J. Comput. 1983 |
Electronic design automation › physical design › routing
channel routing |
0.0 | 1 | 1987 | Finding a Maximum Planar Subset of a Set of Nets in a Channel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 |
Computational geometry › triangulation
delaunay triangulation |
0.0 | 1 | 1987 | Delaunay Graphs are Almost as Good as Complete Graphs · FOCS 1987 |
Computational geometry › geometric graph › geometric spanners
euclidean spanners |
0.0 | 1 | 1987 | Delaunay Graphs are Almost as Good as Complete Graphs · FOCS 1987 |
Graph algorithms and graph theory
graph spanners |
0.0 | 1 | 1987 | Delaunay Graphs are Almost as Good as Complete Graphs · FOCS 1987 |
Graph algorithms and graph theory › planar graphs
maximum planar subset |
0.0 | 1 | 1987 | Finding a Maximum Planar Subset of a Set of Nets in a Channel · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 |
Mathematical optimization › combinatorial optimization › vehicle routing › traveling salesman problem
Euclidean TSP |
0.0 | 2 | 1983 | The Travelling Salesman Problem and Minimum Matching in the Unit Square · SIAM J. Comput. 1983 Heuristics for Weighted Perfect Matching · STOC 1980 |
Mathematical optimization › combinatorial optimization › vehicle routing
traveling salesman problem |
0.0 | 2 | 1983 | The Travelling Salesman Problem and Minimum Matching in the Unit Square · SIAM J. Comput. 1983 Heuristics for Weighted Perfect Matching · STOC 1980 |
Electronic design automation › hardware verification and test
formal verification |
0.0 | 1 | 1986 | A new method for verifying sequential circuits · DAC 1986 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1986 | A new method for verifying sequential circuits · DAC 1986 |
Electronic design automation › physical design › circuit partitioning
logic partitioning |
0.0 | 1 | 1986 | Simulated Annealing Without Rejected Moves · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Electronic design automation › hardware verification and test › formal verification
sequential equivalence checking |
0.0 | 1 | 1986 | A new method for verifying sequential circuits · DAC 1986 |
Electronic design automation
simulated annealing |
0.0 | 1 | 1986 | Simulated Annealing Without Rejected Moves · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Mathematical optimization › metaheuristic optimization
simulated annealing |
0.0 | 1 | 1986 | Simulated Annealing Without Rejected Moves · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1986 |
Electronic design automation › physical design
placement and routing |
0.0 | 2 | 1984 | A Hierarchy-Driven Amalgamation of Standard and Macro Cells · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1984 Reducing channel density in standard cell layout · DAC 1983 |
Approximation and online algorithms
facility location |
0.0 | 1 | 1984 | On the Complexity of Some Common Geometric Location Problems · SIAM J. Comput. 1984 |
Computational geometry › geometric optimization
geometric location problems |
0.0 | 1 | 1984 | On the Complexity of Some Common Geometric Location Problems · SIAM J. Comput. 1984 |
Computational complexity
hardness of approximation |
0.0 | 1 | 1984 | On the Complexity of Some Common Geometric Location Problems · SIAM J. Comput. 1984 |
Algorithms and data structures › clustering › k-center clustering
p-center problem |
0.0 | 1 | 1984 | On the Complexity of Some Common Geometric Location Problems · SIAM J. Comput. 1984 |
Electronic design automation › physical design › routing › channel routing
channel density reduction |
0.0 | 1 | 1983 | Reducing channel density in standard cell layout · DAC 1983 |
Methods — techniques the papers use, named apart from their topics
dynamic programming · 0.0simulated annealing · 0.0intersection graph representation · 0.0induced subgraph analysis · 0.0worst-case analysis · 0.0polynomial-time algorithm · 0.0divide-and-conquer · 0.0symbolic comparison · 0.0geometric analysis · 0.0formal equivalence checking · 0.0reduction from 3-satisfiability · 0.0hierarchical layout · 0.0heuristic algorithm · 0.0amalgamation · 0.0heuristic routing · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1990 | New Techniques for Some Dynamic Closest-Point and Farthest-Point Problems
Kenneth J. Supowit |
SODA | 1 |
| 1990 | Delaunay Graphs are almost as Good as Complete Graphs
David P. Dobkin, Steven J. Friedman, Kenneth J. Supowit |
Discret. Comput. Geom. | 3 |
| 1990 | Finding the Optimal Variable Ordering for Binary Decision DiagramsabstractThe ordered binary decision diagram is a canonical representation for Boolean functions, presented by R.E. Bryant (1985) as a compact representation for a broad class of interesting functions derived from circuits. However, the size of the diagram is very sensitive to the choice of ordering on the variables; hence, for some applications, such as differential cascode voltage switch (DCVS) trees, it becomes extremely important to find the ordering leading to the most compact representation. An algorithm for this problem with time complexity O(n/sup 2/3/sup n/) is presented. This represents an improvement over the previous best algorithm.> Steven J. Friedman, Kenneth J. Supowit |
IEEE Trans. Computers | 2 |
| 1989 | Recognizing circle graphs in polynomial timeabstractThe main result of this paper is an 0 ([ V ] x [ E ]) time algorithm for deciding whether a given graph is a circle graph, that is, the intersection graph of a set of chords on a circle. The algorithm utilizes two new graph-theoretic results, regarding necessary induced subgraphs of graphs having neither articulation points nor similar pairs of vertices. Furthermore, as a substep of the algorithm, it is shown how to find in 0 ([ V ] x [ E ]) time a decomposition of a graph into prime graphs, thereby improving on a result of Cunningham. Csaba P. Gabor, Kenneth J. Supowit, Wen-Lian Hsu |
J. ACM | 2 |
| 1988 | Finding the Vertices Nearest to a Point in a Hypercube
Nicholas J. Patterson, Kenneth J. Supowit |
Inf. Process. Lett. | 2 |
| 1987 | Finding the Optimal Variable Ordering for Binary Decision DiagramsabstractThe ordered binary decision diagram is a canonical representation for Boolean functions, presented by Bryant as a compact representation for a broad class of interesting functions derived from circuits. However, the size of the diagram is very sensitive to the choice of ordering on the variables; hence for some applications, such as Differential Cascode Voltage Switch (DCVS) trees, it becomes extremely important to find the ordering leading to the most compact representation. We present an algorithm for this problem with time complexity O(n/sup 2/3/sup n/), an improvement over the previous best, which required O(n!2/sup n/). Steven J. Friedman, Kenneth J. Supowit |
DAC | 2 |
| 1987 | Delaunay Graphs are Almost as Good as Complete GraphsabstractLet S be any set of N points in the plane and let DT(S) be the graph of the Delaunay triangulation of S. For all points a and b of S, let d(a, b) be the Euclidean distance from a to b and let DT(a, b) be the length of the shortest path in DT(S) from a to b. We show that there is a constant c(≤ 1+√5/2 π ≈ 5.08) independent of S and N such that DT(a, b)/d(a, b) ≪ c. David P. Dobkin, Steven J. Friedman, Kenneth J. Supowit |
FOCS | 3 |
| 1987 | Minimizing Channel Density in Standard Cell Layout
Jean R. S. Blair, Sanjiv Kapoor, Errol L. Lloyd, Kenneth J. Supowit |
Algorithmica | 4 |
| 1987 | Generalization of the Sethi-Ullman Algorithm for Register AllocationabstractAbstract The Sethi‐Ullman algorithm for register allocation finds an optimal ordering of a computation tree. Two simple generalizations of the algorithm increase its applicability without significantly increasing its cost. Andrew W. Appel, Kenneth J. Supowit |
Softw. Pract. Exp. | 2 |
| 1987 | Finding a Maximum Planar Subset of a Set of Nets in a ChannelabstractAn algorithm is presented that, given N two-pin nets in a channel, finds, in O(N/sup 2/) time, the largest subset that can be routed all on one layer Kenneth J. Supowit |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1986 | A new method for verifying sequential circuitsabstractWe present an algorithm for deciding whether two given synchronous, logic-level sequential circuits are functionally equivalent. Our approach involves a formal symbolic comparison, as opposed to the (often very time-consuming) generation and simulation of numerous test vector sequences. The given circuits need not have the same number of states, nor must they have the same number of inputs — for example, one circuit may be a parallel implementation and the other serial. Although this is an intractable problem in general, we believe that the method is useful on a broad class of practical circuits; our computational experience thus far is encouraging. Kenneth J. Supowit, Steven J. Friedman |
DAC | 1 |
| 1986 | Simulated Annealing Without Rejected MovesabstractThe customary need for rejection of candidate moves in simulated annealing is eliminated by biasing the selection of moves according to their effect on the cost function. An efficient implementation can offer a significant speed-up, though with increased memory. The logic partitioning problem is used as an illustration; both simple moves and pairwise interchanges are considered. J. W. Greene, Kenneth J. Supowit |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1985 | Recognizing Circle Graphs in Polynomial TimeabstractOur main result is a polynomialtime algorithm for deciding whether a given graph is a circle graph, that is, the intersection graph of a set of chords on a circle. Our algorithm utilizes two new graph-theoretic results, regarding necessary induced subgraphs of graphs having neither articulation points nor similar pairs of vertices. Csaba P. Gabor, Wen-Lian Hsu, Kenneth J. Supowit |
FOCS | 3 |
| 1985 | Decomposing a Set of Points into Chains, with Applications to Permutation and Circle Graphs
Kenneth J. Supowit |
Inf. Process. Lett. | 1 |
| 1984 | On the Complexity of Some Common Geometric Location ProblemsabstractGiven n demand points in the plane, the p-center problem is to find p supply points (anywhere in the plane) so as to minimize the maximum distance from a demand point to its respective nearest supply point. The p-median problem is to minimize the sum of distances from demand points to their respective nearest supply points. We prove that the p-center and the p-median problems relative to both the Euclidean and the rectilinear metrics are NP-hard. In fact, we prove that it is NP-hard even to approximate the p-center problems sufficiently closely. The reductions are from 3-satisfiability. Nimrod Megiddo, Kenneth J. Supowit |
SIAM J. Comput. | 2 |
| 1984 | A Hierarchy-Driven Amalgamation of Standard and Macro CellsabstractA new methodology for the automatic layout of integrated circuits is presented. The methodology, based on a hierarchical description of the circuit, is a hybrid between standard cell and fully custom, having the advantages of both. It has the ease of placement and routing of standard cell, combined with the ability to handle large numbers of diverse cells as in fully custom. The methodology has been implemented and applied to several circuits, with very encouraging results. Edward M. Reingold, Kenneth J. Supowit |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1983 | Reducing channel density in standard cell layout
Kenneth J. Supowit |
DAC | 1 |
| 1983 | Placement algorithms for custom VLSI
Kenneth J. Supowit, Eric A. Slutz |
DAC | 1 |
| 1983 | The Relative Neighborhood Graph, with an Application to Minimum Spanning TreesabstractThe relative neighborhood graph (RNG) of a set V of pomts in Euchdean space is the graph (V, E), where (p, q) E E iff there is no point z E V such that d(p, z) < d(p, q) and d(q, z) < d(p, q) It is shown that (1) the RNG of n points in the' plane can be found in O(n log n) time, which is optimal to wRlun a multiphcative constant.(2) The RNG, as well as the minimum spanning tree, of the vertices of a convex, n-vertex polygon can be found m O(n) time, given the vertices m sorted clockwise order.(3) Under the assumption that no three input points form an isosceles triangle, the RNG of n points m rdimensional space can be found m O(n 2) time for fixed r >_ 3.Categories and SubJect Descriptors: F Kenneth J. Supowit |
J. ACM | 1 |
| 1983 | Probabilistic analysis of divide-and-conquer heuristics for minimum weighted euclidean matchingabstractAbstract The expected costs of the matchings found by various divide‐and‐conquer heuristic algorithms are calculated, under the assumption that the vertices to be matched are uniformly distributed in the unit square. The expected times of the algorithms are calculated as well. Edward M. Reingold, Kenneth J. Supowit |
Networks | 2 |
| 1983 | Divide and Conquer Heuristics for Minimum Weighted Euclidean MatchingabstractWe consider the following problem: Given n points in a unit square in the Euclidean plane, find a matching of the points such that the cost (i.e., the sum of the lengths of the edges between matched points) is minimum. In particular, we present a class of linear time heuristic algorithms for this problem and analyze their worst case performance. The worst case performance of an algorithm is defined as the greatest possible cost, as a function of n, of the matching produced by the algorithm on a set of n points. Each of the algorithms studied here divides the unit square into a few smaller regions, and then is applied recursively to the points in each of these regions. Kenneth J. Supowit, Edward M. Reingold |
SIAM J. Comput. | 1 |
| 1983 | The Travelling Salesman Problem and Minimum Matching in the Unit SquareabstractWe show that the cost (length) of the shortest traveling salesman tour through n points in the unit square is, in the worst case, $\alpha _{{\text{opt}}}^{{\text{tsp}}} \sqrt n + o(\sqrt n )$, where $1.075 \leqq \alpha _{{\text{opt}}}^{{\text{tsp}}}\leqq 1.414$. The cost of the minimum matching of n points in the unit square is shown to be, in the worst case, $\alpha _{{\text{opt}}}^{{\text{mat}}} \sqrt n + o(\sqrt n )$, where $0.537 \leqq \alpha _{{\text{opt}}}^{{\text{mat}}} \leqq 0.707$. Furthermore, for each of these two problems there is an almost linear time heuristic algorithm whose Worst case cost is, neglecting lower order terms, as low as b Bible. Kenneth J. Supowit, Edward M. Reingold, David A. Plaisted |
SIAM J. Comput. | 1 |
| 1983 | Some NP-hard polygon decomposition problemsabstractThe inherent computational complexity of polygon decomposition problems is of theoretical interest to researchers in the field of computational geometry and of practical interest to those working in syntactic pattern recognition. Three polygon decomposition problems are shown to be NP-hard and thus unlikely to admit efficient algorithms. The problems are to find minimum decompositions of a polygonal region into (perhaps overlapping) convex, star-shaped, or spiral subsets. We permit the polygonal region to contain holes. The proofs are by transformation from Boolean three-satisfiability, a known NP-complete problem. Several open problems are discussed. Joseph O'Rourke, Kenneth J. Supowit |
IEEE Trans. Inf. Theory | 2 |
| 1982 | A minimum-impact routing algorithmabstractA routing heuristic is presented thatroutes two-terminal nets one at a time, for each net choosing the path so as to avoid adversely impacting the nets not yet routed. An algorithm is presented and proved to correctly implement this heuristic; the computational complexity of that algorithm is shown to be polynomially bounded, but perhaps still too great to be of practical use. Another, speedier algorithm is presented that seems to approximate the heuristic rather closely. Strong evidence is given that the Lee routing algorithm is in some sense inadequate to implement this heuristic. Kenneth J. Supowit |
DAC | 1 |
| 1982 | The Complexity of Drawing Trees Nicely
Kenneth J. Supowit, Edward M. Reingold |
Acta Informatica | 1 |
| 1981 | Testing a Simple Polygon for Monotonicity
Franco P. Preparata, Kenneth J. Supowit |
Inf. Process. Lett. | 2 |
| 1980 | Heuristics for Weighted Perfect MatchingabstractThe problem of finding near optimal perfect matchings of an even number n of vertices is considered. When the distances between the vertices satisfy the triangle inequality it is possible to get within a constant multiplicative factor of the optimal matching in time O(n2 log K) where K is the ratio of the longest to the shortest distance between vertices. Other heuristics are analyzed as well, including one that gets within a logarithmic factor of the optimal matching in time O(n2 log n). Finding an optimal weighted matching requires t(n3) time by the fastest known algorithm, so these heuristics are quite useful. When the n vertices lie in the unit (Euclidean) square, no heuristic can be guaranteed to produce a matching of cost less than [equation] in the worst case. We analyze various heuristics for this case, including one that always produces a matching costing at most [equation]. In addition, this heuristic also finds a traveling salesman tour of the n vertices costing at most [equation]. A different one of the heuristics analyzed produces asymptotically optimal results. It is also shown that asymptotically optimal traveling salesman tours can be found in O(n log n) time in the unit square. Kenneth J. Supowit, David A. Plaisted, Edward M. Reingold |
STOC | 1 |