Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from VLDB 2026 / reviewers in the wild / expert

Jonathan Shalev

dblp:03/4632 · DBLP profile ↗
← Back
3ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 3Theory of computation · 2Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%
Theoretical computer science
1 paper
Automated reasoning and model checking · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
microprogramming		 0.112005
Formal Verification of Backward Compatibility of Microcode · CAV 2005
Automated reasoning and model checking
hardware verification		 0.112005
Formal Verification of Backward Compatibility of Microcode · CAV 2005

Methods — techniques the papers use, named apart from their topics

formal verification · 0.1
YearPublicationVenuePosition
2010 Applying SMT in symbolic execution of microcode
Anders Franzén, Alessandro Cimatti, Alexander Nadel, Roberto Sebastiani, Jonathan Shalev
 FMCAD5
2008 Efficient Symbolic Simulation of Low Level Software
abstract
Symbolic execution has long been a staple technique for formal hardware verification. Its application to software requires methods for dealing with software specific complexities. In this paper we elaborate methods for the efficient symbolic simulation of embedded software; some methods are new, others are improvements of existing methods. Using these techniques we have been able to symbolically execute real life microcode of thousands of lines, allowing formal methods to become an integral part of microcode validation in Intel Corporation.
Tamarah Arons, Elad Elster, Shlomit Ozer, Jonathan Shalev, Eli Singerman
 DATE4
2005 Formal Verification of Backward Compatibility of Microcode
Tamarah Arons, Elad Elster, Limor Fix, Sela Mador-Haim, Michael Mishaeli, Jonathan Shalev, Eli Singerman, Andreas Tiemeyer, Moshe Y. Vardi, Lenore D. Zuck
 CAV6