The symmetry-breaking phenomenon, appearing, under suitable conditions, when identical reaction cells, quiet on their own, are let interact via diffusion processes, is dubbedTuring Instability. Its local form exposes the local destabilization, which allows two multistable cells lose stability at one of its locallyasymptotically-stableoperating points. While the globalTuring Instabilityand its mechanisms have been recently explained in (Ascoli et al., 2022), its local form and an experimental demonstration of these complex effects on a physical memristive medium have not been reported yet. This paper investigates a local form ofTuring Instabilityin a two-cell array, when one of the possiblelocally asymptotically-stableandlocally-activestatic solutions loses stability, when let interact with an identical reaction cell via diffusion processes, resulting in the emergence of two different static solutions after transients fade away. In order to study its mechanisms, this paper first introduces a current-controlled Chua Corsage Memristor (CCM), and demonstrates the operating point destabilization in a single current-controlled CCM-based cell. Adding a dissipative resistor and a capacitor to the current-controlled CCM, preliminarily poised on anedge of chaosoperating point, gives birth to two unstable circuits, inducing a local quiescent bi-stability and a local oscillation, respectively. The mechanisms behind a local form ofTuring Instability, appearing in a current-controlled CCM-based two-cell array, have been elucidated, and the bifurcation, spawning symmetry-breaking effects, locally, across the cellular network, has been identified. Both numerical and experimental results confirm the correctness of the theoretical analysis.

The electrical engineering community, interested to develop bio-inspired circuits, approaching the efficiency of the neural networks, is searching passionately for accurate yet simple electronic neurons, or neuristors for short. In recent years, the advent of volatile memristor devices, typically referred to as threshold switches, which admit a negative differential resistance under suitable polarization, similarly as the sodium and potassium ion channels across neuronal axon membranes, has opened up new exciting opportunities in neuromorphic circuit design, enabling innovative analogue electronic cells, capable to reproduce closely the intricate dynamical behaviors of biological neurons without requiring a disproportionate use of resources. The study, presented in this manuscript, achieves an important milestone in this area of research, demonstrating, through a circuit design approach based upon concepts and techniques from Dynamical System Theory, how to leverage the rich dynamics of a threshold switch, capable to boost a periodic sine-wave current signal of infinitesimal amplitude, while acting as a source of local energy, when poised on a suitable bias point, lying along the negative differential resistance branch of the respective S-shaped DC current-voltage characteristic, to induce, one after the other, the three fundamental bifurcations, governing the evolution of an electrical voltage spike from birth to extinction via the All-to-None effect across a biological axon membrane under a reverse sweep in the net synaptic current, according to the fourth-order Hodgkin-Huxley neuron model, in a second-order three-element circuit of unprecedented simplicity, as the current, generated by a DC source, appearing in parallel to a linear capacitor as well as to the volatile locally-active memristor, is subject to a monotonic increase.

This manuscript sheds light into the fundamental importance of the Principles of Local Activity and Edge of Chaos for the future design of innovative circuits, which, employing biomimetic memristive devices, are ideally suited for the development of energy-efficient artificially-intelligent technical systems. The focus of the work is the design of a Second-Order Reactance-Less Oscillator, across which oscillations may develop if and only if at least one of its two different volatile thermally-activated memristor physical realizations is biased along a negative differential resistance branch of the respective DC locus, which turns it into a source of local energy. Very importantly, the proposed cell is first found to lock in the oscillatory mode out of a local Hopf Supercritical Bifurcation when its design parameters are chosen from the Edge of Chaos region, providing clear evidence for the high degree of excitability it acquires as a result.

A new paradigmatic model, only containing a cubic nonlinearity and enabling to describe a continuous transition from Van der Pol’s relaxation to Chua’s chaotic oscillations is proposed. The corresponding electronic oscillator that perfectly fits the model is analyzed and validated by two different approaches including Spice simulations and an implementation based on a Field-Programmable Analog Array (FPAA) platform. The perfect agreement between theory and experimental results confirms the ability of this model for modeling chaos both theoretically and experimentally. The new chaotic and relaxation oscillator has the typical characteristics of both the Van der Pol and Chua memristors circuits.

The Edge of Chaos Principle lies at the origin of emergent phenomena in physical systems. Recurring to powerful concepts from the theory, establishing its rules, it is possible to identify regions of the parameter space of a system, endowing the latter with a high degree of excitability, which can then manifest itself vividly, as complexity emerges across the respective physical medium upon apparently-harmless changes to the environmental conditions. In this manuscript, the first of a two-paper contribution, the Edge of Chaos Principle is invoked to explain the mechanisms, underlying the development of recently-reported yet-unexplained oscillations across a biological cell, consisting of a voltage-driven sodium ion channel, including leakage effects. Our in-depth investigation of the Local Activity and Edge of Chaos of the biological cell, based upon the rigorous mathematical description, first proposed by Hodgkin and Huxley in 1952, identifies the subcritical Hopf, which emerges across its physical medium as it enters one of its two Edge of Chaos domains, giving birth to the aforementioned oscillations, whose unstable nature is thus revealed. The existence of an unstable limit-cycle attractor in the state space of the Hodgkin-Huxley neuron model is crucially important for the All-to-None dynamical phenomenon, which distinctively characterises the evolution of the membrane capacitance voltage under DC synaptic current sweep. Thus the discovery of the capability of the sodium ion channel to generate unstable oscillations on its own, highlights the fundamental role of this biological memristor in the mechanisms behind emergence and extinction of an Action Potential across a neuronal axon. As the cell, studied in this manuscript, is unable to sustain stable oscillations, the second companion paper shall demonstrate how the insertion of a membrane capacitance across the sodium ion channel, reduced to a first-order system by neglecting the dynamics of the fast activation gate variable, is necessary and sufficient to endow the original biological cell with the capability to undergo also a supercritical Hopf bifurcation, besides the subcritical one, which allows the observation of the entire life cycle of a neuronal spike under DC synaptic current sweep, including, especially, the All-to-None phenomenon spawned out of a fold or saddle-node limit cycle bifurcation.

No isolated system may ever support complexity. Emergent phenomena may however appear in an open system, if, as established by the Edge of Chaos theory, some of its constitutive elements feature the capability to amplify infinitesimal fluctuations in energy, provided an external source supplies them with a sufficient amount of DC power, which is known to be a signature for locally-active behaviour. In particular, complex behaviours, including static and dynamic pattern formation, may emerge in arrays of identical diffusively-coupled cells, if and only if the basic unit is poised on a particular sub-domain of the Local Activity regime, referred to as Edge of Chaos, within which a quiet state hides in fact a high degree of excitability. Here we show, for the first time, that these counterintuitive phenomena may emerge in a basic memristor cellular neural network, consisting of two identical diffusively-coupled second-order cells. The proposed bio-inspired array represents the simplest ever-reported open system, which reproduces the shocking phenomenon, reported by Smale in 1974, when, while studying a model from cellular biology, he observed two identical reaction cells, “mathematically dead” on their own, pulsating together upon diffusive coupling. Impressively, the bio-inspired two-cell reaction-diffusion network contains only nine circuit elements, specifically two DC voltage sources, three linear resistors, two linear capacitors, and two functional niobium oxide (NbO) memristors from NaMLab. Applying the theory of Local Activity to an accurate model of the memristor oscillator, a comprehensive picture for its local and global dynamics may be drawn, providing a systematic method to tune the design parameters of the two-cell array to enable diffusion-driven instabilities therein.

Diffusion-driven instabilities with pattern formation may occur in a network of identical, regularly-spaced, and resistively-coupled cells if and only if the uncoupled cell is poised on a locally-active and stable operating point in the Edge of Chaos domain. This manuscript presents the simplest ever-reported two-cell neural network, combining together only 7 two-terminal components, namely 2 batteries, 3 resistors, and 2 volatile NbOx memristive threshold switches from NaMLab, and subject to diffusion-driven instabilities with the concurrent emergence of Turing patterns. Very remarkably, this is the first time an homogeneous cellular medium, with no other dynamic element than 2 locally-active memristors, hence the attribute all-memristor coined to address it in this paper, is found to support complex phenomena. The destabilization of the homogeneous solution occurs in this second-order two-cell array if and only if the uncoupled cell circuit parameters are chosen from the Edge of Chaos domain. A deep circuit- and system-theoretic investigation, including linearization analysis and phase portrait investigation, provides a comprehensive picture for the local and global dynamics of the bio-inspired network, revealing how a theory-assisted approach may guide circuit design with inherently non-linear memristive devices.

We present a compact, continuous, and numerically stable version of a tantalum oxide (TaOx) memristor model which can be employed for robust and reliable simulations of large scale memristor based circuits. The original model contains a piecewise differentiable function in the memductance expression and discontinuous step functions in the state equation. Additionally, the original model does not set a proper upper bound for the state variable and may admit blowing up solutions due to an exponential power term, preventing the use of it for numerically reliable simulations. Considering these drawbacks, we modify the original model so as to i) simplify the memductance function while removing its piecewise differentiable nonlinearity, ii) include a proper window function for the ON state dynamics, which is missing in the original model, iii) modify and bound the exponential power term to prevent an uncontrollable blow-up of the solutions, and iv) apply a process called unification, allowing us to remove the step functions inherent in the model, which is a novelty in state-limited memristor models. We validate the accuracy of the proposed model via DC and transient simulations, dynamic route map analysis and a Spice implementation of an anti-series configuration, showing the applicability of the model.

As the limits of transistor technology are approached, feature size in integrated circuit transistors has been reduced very near to the minimum physically-realizable channel length, and it has become increasingly difficult to meet expectations outlined by Moore’s law. As one of the most promising devices to replace transistors, memristors have many excellent properties that can be leveraged to develop new types of neural and non-von Neumann computing systems, which are expected to revolutionize information-processing technology. This survey provides a comparative overview of research progress on memristors. Different memristor synaptic devices are classified according to stimulation patterns and the working mechanisms of these various synaptic devices are analyzed in detail. Crossbar-based memristors have demonstrated advantages in physically executing vector-matrix multiplication and enabling highly power-efficient and area-efficient neuromorphic system designs. The extensive uses of crossbar-based memristors cover in-memory logic, vector-matrix multiplication, and many other fundamental computing operations. Furthermore, memristor-based architectures for efficient neural network training and inference have been studied. However, memristors have non-ideal properties due to programming inaccuracies and device imperfections from fabrication, which lead to error or mismatch in computed results. To build reliable memristor-based designs, circuit-level, algorithm-level, and system-level solutions to memristor reliability issues are being studied. To this end, state-of-the-art realizations of memristor crossbars, crossbar-based designs, and peripheral circuitry are presented, which show both promising full-system inference accuracy and excellent power efficiency in multiple tasks. Memristor in-situ learning benefits from high energy efficiency and biologically-imitative characteristics, which are conducive to further realizing hardware acceleration of cognitive learning. At present, the learning and training processes of brain-like networks are complex, presenting great challenges for network design and implementation.

In 1971, Dr. Leon Chua, known as the father of nonlinear circuits and cellular neural networks, postulated the existence of memristor, a portmanteau of memory resistor, in his seminal paper: Memristor-the missing circuit element published in IEEE Transactions on Circuit Theory, the predecessor of IEEE Transactions on Circuits and Systems. Thirty-seven years after he predicted its existence, in the May 1 (2008) issue of the journalNature, a team at HP Labs led by the scientist R. S. Williams proved that the memristor was real by formulating a physics-based model of a memristor and build nanoscale devices in their lab that demonstrate all of the necessary operating characteristics. Since then, the extensive interest of academic and industrial circles on neuromorphic computing based on memristor has been skyrocketed. Moreover, the unusual electrical properties of circuits and systems based on memristor can mimic the functionalities of the human brain, and can provide an in-depth understanding of key design implications of memristor-based memories, such as learning and anticipating. As a result, neuromorphic computing based on memristor is expected to bring significant breakthrough in dynamic neuromorphic memories, memristor-based resistive RAM, non-volatile memory technology, and so on.

In 1971, Dr. Leon Chua, known as the father of nonlinear circuits and cellular neural networks, postulated the existence of memristor, a portmanteau of memory resistor, in his seminal paper: “Memristor—The missing circuit element” published in IEEE Transactions on Circuit Theory, the predecessor of IEEE Transactions on Circuits and Systems—I: Regular Papers. In 2008, Hewlett-Packard researchers made nanomemristor devices for the first time, setting off an upsurge of memristor research. The emergence of nanomemristor devices is expected to realize nonvolatile RAM. Moreover, the integration, power consumption, and read–write speed of the RAM based on memristor are superior to those of traditional RAMs. The hardware network based on memristor synaptic devices is an important development direction of neuromorphic computing. It is a powerful technical candidate to break through the traditional von Neumann computing architecture in the post-Moore era, which will provide a feasible scheme about a technological breakthrough for surpassing Moore’s law.

Memristor crossbar arrays are used in a wide range of in-memory and neuromorphic computing applications. However, memristor devices suffer from non-idealities that result in the variability of conductive states, making programming them to a desired analog conductance value extremely difficult as the device ages. In theory, memristors can be a nonlinear programmable analog resistor with memory properties that can take infinite resistive states. In practice, such memristors are hard to make, and in a crossbar, it is confined to a limited set of stable conductance values. The number of conductance levels available for a node in the crossbar is defined as the crossbar’s resolution. This paper presents a technique to improve the resolution by building a super-resolution memristor crossbar with nodes having multiple memristors to generate$r$-simplicial sequence of unique conductance values. The wider the range and number of conductance values, the higher the crossbar’s resolution. This is particularly useful in building analog neural network (ANN) layers, which are proven to be one of the go-to approaches for forming a neural network layer in implementing neuromorphic computations.

Neuromorphic computing can solve computationally hard problems with energy efficiencies unattainable for von Neumann architectures. A locally-active memristor, which possesses the capability to amplify infinitesimal fluctuations in energy and can be used to generate neuromorphic behaviors, is a natural candidate for constructing an electronic equivalent of biological neurons. This paper identifies some unknown neuromorphic dynamics of the Chua corsage memristor (CCM), and shows that the CCM, when biased at the edge of chaos domain, can exhibit rich dynamics of biological neurons. Using Chua’s theories of local activity and edge of chaos, we demonstrate that under the destabilizing of the input voltage and the circuit parameters (inductance or capacitance), two CCM-based circuits can produce thirteen types of neuromorphic behaviors either on, or near the edge of chaos domain via supercritical or subcritical Hopf bifurcation. In addition, we give the conditions to test the edge of chaos of the CCM and the CCM-based circuit only by using the poles and the zero of their admittance functions.

We present and experimentally validate two minimal compact memristive models for spiking neuronal signal generation using commercially available low-cost components. The first neuron model is called the Memristive Integrate-and-Fire (MIF) model, for neuronal signaling with two voltage levels: the spike-peak, and the rest-potential. The second model MIF2 is also presented, which promotes local adaptation by accounting for a third refractory voltage level during hyperpolarization. We show both compact models are minimal in terms of the number of circuit elements and integration area. Using the MIF and MIF2 models, we postulate the design of a memristive solid-state brain with an estimation of its surface area and power consumption. Analytical projections show that a memristive solid-state brain could be realized within (i) the surface area of the median human brain, 2,400cm2, (ii) the same volume of the median human brain, and (iii) a total power budget of approximately 20 W using a 3.5 nm technology. Distinct from the past decade of memristive neuron literature, our benchmarks are attained using generic commercially available memristors that are reproducible using off-the-shelf components. We expect this work can promote more experimental demonstrations of memristive circuits that do not rely on prohibitively expensive fabrication processes.

The paper considers a relevant class of networks containing memristors and (possibly) nonlinear capacitors and inductors. The goal is to unfold the nonlinear dynamics of these networks by highlighting some main features that are potentially useful for real-time signal processing and in-memory computing. In particular, an analytic treatment is provided for dynamic phenomena as the presence of invariant manifolds, the coexistence of different regimes, complex dynamics and attractors and the phenomenon of bifurcations without parameters, i.e., bifurcations due to changing the initial conditions of the state variables for a fixed set of circuit parameters. The paper also addresses the issue of how to design pulse independent voltage or current sources to steer the network dynamics through different manifolds and attractors. Two relevant examples are worked out in details, namely, a variant of Chua's circuit with a memristor and a nonlinear capacitor and a relaxation oscillator with a memristor and a nonlinear inductor. In the latter example, the paper also studies the effect on manifolds and coexisting dynamics when real memristive devices are accounted for using a class of extended memristor models. The analysis is conducted by means of a recently developed technique named flux-charge analysis method (FCAM). Numerical simulations are presented to confirm the theoretic findings.

This paper presents a circuit-theoretic analysis of a NbO2-Mott memristor fabricated at Hewlett-Packard Labs. It investigates mechanisms behind the origin of complexity based on local activity, which characterizes the behavior of this outstanding nanodevice. We propose an accurate, particularly simplified version of a recently introduced physical model suitable for large-scale circuit simulations. Following the concept of local activity, we then conduct a small-signal circuit-theoretic derivation of the impedance and associated small-signal equivalent circuit elements to analyze device stability and frequency response. Finally, our analysis reveals locally active operating regions, as well as regions where the device dynamics are positioned on the edge of chaos. The latter regions are crucial for designing bio-inspired computing systems.

The introduction of memcomputing memristors into the design of Cellular Nonlinear Networks (CNNs) allows to reduce the integrated circuit area typically allocated to each processing element in hardware realizations. Furthermore, the highly nonlinear dynamics of memristors enriches the multivariate signal processing capabilities of these cellular memprocessing structures. This is demonstrated in this paper, where the standard and generalized Dynamic Route Map analysis tools are employed to elucidate the mechanisms by which a Memristor CNN with bistable-like and analog dynamic nonvolatile memristors executes fundamental image processing operations, respectively.

In this paper, we propose a new model for practical, nano-scale, NbO2-based Mott memristors, which is based on a thorough analysis performed on a recently presented physics-based model for these devices. Our investigations revealed that the 3D Poole-Frenkel conduction mechanism adopted in the aforementioned model, can be well-approximated by a transport equation in which: a) memristor current is expressed as a linear function of memristor voltage and b) the device memductance is solely dependent on the device temperature which represents the memristor state. The resulting simplified mathematical form of the original differential algebraic equation set is not only more suitable for simulating large-scale, nano-scale NbO2-based memristor circuits, but is also ideal for circuit-theoretic investigations which may allow an in depth understanding of the peculiar nonlinear behaviors of these devices.

Nonlinear dynamic memory elements, as memristors, memcapacitors, and meminductors (also known as mem-elements), are of paramount importance in conceiving the neural networks, mem-computing machines, and reservoir computing systems with advanced computational primitives. This paper aims to develop a systematic methodology for analyzing complex dynamics in nonlinear networks with such emerging nanoscale mem-elements. The technique extends the flux-charge analysis method (FCAM) for nonlinear circuits with memristors to a broader class of nonlinear networks N containing also memcapacitors and meminductors. After deriving the constitutive relation and equivalent circuit in the flux-charge domain of each two-terminal element in N , this paper focuses on relevant subclasses of N for which a state equation description can be obtained. On this basis, salient features of the dynamics are highlighted and studied analytically: 1) the presence of invariant manifolds in the autonomous networks; 2) the coexistence of infinitely many different reduced-order dynamics on manifolds; and 3) the presence of bifurcations due to changing the initial conditions for a fixed set of parameters (also known as bifurcations without parameters). Analytic formulas are also given to design nonautonomous networks subject to pulses that drive trajectories through different manifolds and nonlinear reduced-order dynamics. The results, in this paper, provide a method for a comprehensive understanding of complex dynamical features and computational capabilities in nonlinear networks with mem-elements, which is fundamental for a holistic approach in neuromorphic systems with such emerging nanoscale devices.

The volume, veracity, variability, and velocity of data produced from the ever increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks, and open problems in the field of neuromemristive circuits for edge computing.

In this paper we propose a new mem-computing image processing architecture, called Memristor Cellular Nonlinear Network, which leverages the unique capability of nonvolatile memristors to compute and store data in the same physical nano-scale locations. Adopting a bistable-like memristor in place for the linear resistor in the standard realization of a cell of the nonlinear dynamic array, the resulting network is capable to process information by exploiting the time evolution of the voltages across the memristors as well as to store/retrieve results into/ from the memristances. This attractive feature, absent in a standard Cellular Nonlinear Network, may pave the way towards the future development of a new generation of visual processors with unprecedented spatial resolution.

In this paper, a memristive artificial neural circuit imitating the excitatory chemical synaptic transmission of biological synapse is designed. The proposed memristor-based neural circuit exhibits synaptic plasticity, one of the important neurochemical foundations for learning and memory, which is demonstrated via the efficient imitation of short-term facilitation and long-term potentiation. Moreover, the memristive artificial circuit also mimics the distinct biological attributes of strong stimulation and deficient synthesis of neurotransmitters. The proposed artificial neural model is designed in SPICE, and the biological functionalities are demonstrated via various simulations. The simulation results obtained with the proposed artificial synapse are similar to the biological features of chemical synaptic transmission and synaptic plasticity.

In this two-part paper we present an innovative bio-inspired approach to control the lift of a limb of a humanoid robot called Myon from the stable rest state to the unstable upright position. The proposed paradigm outperforms the state-of-the art approach in terms of time- and energy-efficiency, while maintaining a good degree of adaptability to changes to the nominal operating conditions. This Part I paper introduces the theory behind the novel three-phase control strategy, while the companion Part II manuscript derives its circuit implementation, and analyses its performance to validate the theoretic findings. The critical steps in the proposed strategy are the determination of an estimate for the time duration of the first phase, the storage of the result of this computation over the time interval between two consecutive applications of the control action, and the adaptation of this calculation to changes to the nominal operating conditions. All these three tasks may be successfully accomplished by leveraging the computing, memory, and learning capabilities of a single non-volatile memristor.

The standard Go-Against-the-Force strategy to lift a limb of a humanoid robot from the stable rest state to the upright position and to maintain it there afterwards is slow and consumes a significant amount of energy due to the iterative cycle of sensing and driving operations its application consists of. In order to enhance the performance of the control action, the Part I paper introduced the theory behind an innovative three-phase strategy, called Kick-Fly-Catch paradigm, which is expected to lead to a faster limb motion under a lower energy cost as compared to the original approach. The combined ability of a non-volatile memristor to process data according to Ohm's law, store computation results at power off, and adapt its dynamic behaviour on the basis of its state equation is at the origin for the performance benefits of the proposed strategy over the standard approach. This Part II paper designs a circuit implementation for the overall dynamic system under the new control strategy, and validates the theoretic predictions of the Part I manuscript.

In this paper we study the effects of noise in computing devices composed by coupled memristive oscillators. In particular, we will focus the attention on the emergence of spatiotemporal chaos in a computing architecture made of simple oscillators composed by three basic elements, namely a capacitor, an inductor and a memristor, driven by a sinusoidal external signal. The characterization of the dynamical behavior of the simple oscillator in terms of flux and charge will be discussed and the counterintuitive role of initial conditions on memristors will be highlighted. Aim of this contribution is to provide evidence that a robust synchronized emergent behavior can be attained as a direct positive consequence of the presence of unavoidable sources of noise on initial conditions.

The study on stochastic effects occurring at the nanoscales in VLSI memristive devices is a timely topic which is gaining a growing interest. Indeed, these effects are often linked to the occurrence of nonlinear phenomena, such as spatiotemporal chaos. In this paper, we present evidence that spatiotemporal chaos in VLSI memristive systems can also be tamed by exploiting the unavoidable sources of noise affecting the dynamical behavior of the device. In particular, we aim at investigating this scenario starting from the results observed in several nonlinear oscillators, where the presence of noise facilitates their synchronization. In particular, we focus on the role of noise acting on initial conditions in memristive nonlinear oscillators. In this paper, we focus on a nonautonomous memristive oscillator characterizing its dynamics with respect to the memristor initial conditions and deriving a suitable model in which they appear as further system parameters and exploiting this dependence for the synchronization of an array of coupled nonlinear chaotic memristive oscillators.

Recently a circuit-theoretical work showed that a purely mathematical memristor model may exhibit two distinct stable DC characteristics, as well as two distinct stable pinched hysteresis loops emerging under the same AC periodic excitation by simply changing the memristor initial state. This work presents the first ever real memristor which exhibits such a peculiar bistable behaviour, thus giving a strong practical evidence for the latest theoretical developments in memristor circuit theory.

Cellular Neural/Nonlinear Networks (CNN) were invented in 1988, as an easy to implement, easy to program computer architecture for image and signal processing. This initiated intensive international research activities that lead to both theoretical (e.g. universality, stability studies in array dynamics) and experimental results (e.g. cellular sensor-processor chips and cellular algorithms). This overview paper summarizes the history of the CNN research and overviews the current activities in this field. Other areas are also discussed which were fostered by the results of the 25 years of CNN research: memristor architectures and processing, spin-torque oscillator architectures, many-core FPGA processing and industrial vision chips.

This article reexamines the historical carbon arc discharge experiment conducted by Humphry Davy in 1801. We present experimental evidence which indicates that such a carbon arc discharge is not only the first artificial light source, but also the world's first man-made memristor ever reported in the scientific literature. The original carbon arc discharge experiment has been repeated with modern power supply equipment with bipolar excitation capability. The carbon arc discharge exhibits the three fingerprints of memristors, including the pinched hysteresis loops, the lobe area changing with operating frequency, and such lobe area approaching zero as the operating frequency increases.

In the current paper, it has been demonstrated through experimental results, historical citations and technical arguments that coherer (including cat's whisker) is the elusive memristor. The current paper draws parallel between the research pursued by scientists in the field of memristor and that in coherer, around a century back. The paper discusses various important milestones in the research of that era along with memristor research and how the scientific community missed to identify the memristor despite being very close to the discovery. The paper demonstrates that the first radios were made of memristor and provides novel applications of the same.

In this paper, we show a simple circuit setup for experimentally plotting the v - i non-transversal pinched-hysteresis Lissajous fingerprint of a physical memristor - the common fluorescent gas discharge tube. The setup helped us investigate the effects of physical parasitics (inductors and capacitors) on the memristor v - i.

This paper presents a memristor based new synaptic circuit, consisting of five memristor in a bridge structure together with one differential amplifier. The circuit is able to perform positive and negative weighting for pulse type inputs in neural cells. Processing is conducted with applied pulses at a common terminal in different time slots. It is compact, non-volatile and low power efficient. Simulations of sign setting, weight setting and synaptic multiplication are performed with hp TiO2memristor models.

This tutorial clarifies the axiomatic definition of$( \color{#FF0000}v^{\color{#000000}(\color{#FF0000}\alpha\color{#000000})}\color{#000000},\color{#FF0000}i^{ \color{#000000}(\color{#FF0000}\beta\color{#000000})}\color{#000000})$circuit elements via a lookup table dubbed an A-pad, of admissible$(\color{#FF0000}v\color{#000000},\color{#FF0000}i\color{#000000})$signals measured via Gedanken probing circuits. The$(\color{#FF0000}v^{ \color{#000000}(\color{#FF00FF}\alpha\color{#000000})}\color{#000000},\color{#FF0000}i^{\color{#000000}( \color{#FF00FF}\beta\color{#000000})}\color{#000000})$elements are ordered via a complexity metric. Under this metric, the memristor emerges naturally as the fourth element, characterized by a state-dependent Ohm's law. A logical generalization to memristive devices reveals a common fingerprint consisting of a dense continuum of pinched hysteresis loops whose area decreases with the frequency$ \omega$and tends to a straight line as$\omega \rightarrow\infty$, for all bipolar periodic signals and for all initial conditions. This common fingerprint suggests that the term memristor be used henceforth as a moniker for memristive devices.

In this paper, we propose a memristor bridge circuit consisting of four identical memristors that is able to perform zero, negative, and positive synaptic weightings. Together with three additional transistors, the memristor bridge weighting circuit is able to perform synaptic operation for neural cells. It is compact as both weighting and weight programming are performed in a memristor bridge synapse. It is power efficient, since the operation is based on pulsed input signals. Its input terminals are utilized commonly for applying both weight programming and weight processing signals via time sharing. In this paper, features of the memristor bridge synapses are investigated using the TiO memristor model via simulations.

Analog hardware architecture of a memristor bridge synapse-based multilayer neural network and its learning scheme is proposed. The use of memristor bridge synapse in the proposed architecture solves one of the major problems, regarding nonvolatile weight storage in analog neural network implementations. To compensate for the spatial nonuniformity and nonideal response of the memristor bridge synapse, a modified chip-in-the-loop learning scheme suitable for the proposed neural network architecture is also proposed. In the proposed method, the initial learning is conducted in software, and the behavior of the software-trained network is learned by the hardware network by learning each of the single-layered neurons of the network independently. The forward calculation of the single-layered neuron learning is implemented on circuit hardware, and followed by a weight updating phase assisted by a host computer. Unlike conventional chip-in-the-loop learning, the need for the readout of synaptic weights for calculating weight updates in each epoch is eliminated by virtue of the memristor bridge synapse and the proposed learning scheme. The hardware architecture along with the successful implementation of proposed learning on a three-bit parity network, and on a car detection network is also presented.

We extend the notion of memristive systems to capacitive and inductive elements, namely, capacitors and inductors whose properties depend on the state and history of the system. All these elements typically show pinched hysteretic loops in the two constitutive variables that define them: current-voltage for thememristor,charge-voltage for thememcapacitor,and current-flux for thememinductor. We argue that these devices are common at the nanoscale, where the dynamical properties of electrons and ions are likely to depend on the history of the system, at least within certain time scales. These elements and their combination in circuits open up new functionalities in electronics and are likely to find applications in neuromorphic devices to simulate learning, adaptive, and spontaneous behavior.

Summary form only given. The cellular neural/nonlinear network (CNN) and the CNN based cellular nonlinear wave computer concepts are introduced. The CNN is also referred to as a brain-like computer. The summary of a multilayer CNN retina model is presented. Physical implementations are reviewed; including emulated digital as well as mixed mode and optical implementations. Using single chip visual microprocessors for the highest speed camera computer, the Bi-i is described. Practical applications are highlighted.

Not all molecular and nanodevices are useful from an information technology perspective. Such devices are said to be inept in a precise technical sense that can be easily tested from an explicit mathematical criteria to be presented in this two-part tutorial review. Often an inept device can be redesigned into a smart device capable of computing and artificial intelligence by massaging the device's parameters, such as doping, concentration, geometrical profile, chemical moiety, etc., in accordance with the principle of local activity to be articulated in Part II. In particular, designing a smart nanodevice amounts to fine tuning the device parameters into a much smaller niche within the device's locally active parameter region called the edge of chaos where complexity abounds. Molecular and nanodevices will remain novelty toys for nanodevice specialists unless they possess realistic nonlinear circuit models so that future nano circuit designers can simulate their exotic designs as easily and accurately as current CMOS circuit designers. A mathematically consistent theory for modeling nonlinear, high-frequency nanodevices, specially those which exploited exotic tunneling and entanglement quantum mechanical effects, such as Coulomb blockade, quasi-particle dynamics, Kondo resonance, Aharonov-Bohm nonlocal interactions, etc., will require the introduction of a complete family of fundamental circuit elements as model building blocks. They are presented via a doubly periodic table of circuit elements somewhat reminiscent of Mendeleev's periodic table of chemical elements. These fundamental circuit elements can be compactly represented by a loop of four generic species of circuit elements wrapped around the surface of a torus where any higher order element having an arbitrarily high order of frequency dependence can be generated from one of them, modulo the integer 4, ad infinitum. The significance of this four-element torus is that realistic circuit models of all current and future molecular and nanodevices must necessarily build upon an appropriate subset of nonlinear circuit elements begotten from this torus.

This paper introduces a novel neural architecture which is capable of similar performance to any of the "classic" neural paradigms while having a very simple and efficient mixed-signal implementation which makes it a valuable candidate for intelligent signal processing in portable multimedia applications. The architecture and its realization circuit are described and the functional capabilities of the novel neural architecture called a simplicial neural cell are demonstrated for both regression and classification problems including nonlinear image filtering.

In this study, we present the initial results of cellular neural network (CNN)-based autowave metric to high-speed pattern recognition of gray-scale images. the application is to a problem involving separation of metallic wear debris particles from air bubbles. This problem arises in an optical-based system for determination of mechanical wear. This paper focuses on distinguishing debris particles suspended in the oil flow from air bubbles and aims to employ CNN technology to create an online fault monitoring system. For the class of engines of interest bubbles occur much more often than debris particles and the goal is to develop a classification system with an extremely low false alarm rate for misclassified bubbles. The designed analogic CNN algorithm detects and classifies single bubbles es and bubble groups using binary morphology and autowave metric. The debris particles are separated based on autowave distances computed between bubble models and the unknown objects. Initial experiments indicate that the proposed algorithm is robust and noise tolerant and when implemented on a CNN universal chip it provides a solution in real time.

Data compressing, data coding, and communications in object-oriented multimedia applications like telepresence, computer-aided medical diagnosis, or telesurgery require an enormous computing power-in the order of trillions of operations per second (TeraOPS). Compared with conventional digital technology, cellular neural/nonlinear network (CNN)-based computing is capable of realizing these TeraOPS-range image processing tasks in a cost-effective implementation. To exploit the computing power of the CNN Universal Machine (CNN-UM), the CNN chipset architecture has been developed-a mixed-signal hardware platform for CNN-based image processing. One of the nonstandard components of the chipset is the cache memory of the analog array processor, the analog random access memory (ARAM). This paper reports on an ARAM chip that has been designed and fabricated in a 0.5-/spl mu/m CMOS technology. This chip consists of a fully addressable array of 32/spl times/256 analog memory registers and has a packing density of 637 analog-memory-cells/mm/sup 2/. Random and nondestructive access of the memory contents is available. Bottom-plate sampling techniques have been employed to eliminate harmonic distortion introduced by signal-dependent feedthrough. Signal coupling and interaction have been minimized by proper layout measures, including the use of protection rings and separate power supplies for the analog and the digital circuitry. This prototype features an equivalent resolution of up to 7 bits-measured by comparing the reconstructed waveform with the original input signal. Measured access times for writing/reading to/from the memory registers are of 200 ns. I/O rates via the l6-line-wide I/O bus exceed 10 Msamples/s. Storage time at room temperature is in the 80 to 100 ms range, without accuracy loss.

Cellular neural/nonlinear networks (CNN) are considered for efficient implementation of the most computationally intensive steps of dynamic image coding. Several analogic CNN algorithms are presented for the generation of binary image masks and image decomposition. Measurement results for the first CNN universal chips executing an analogic algorithm for a reconstruction operator are also presented. Based on measured execution times, the viability of the CNN implementation of efficient but computationally expensive compression algorithms such as dynamic image coding is assessed.

In this paper, the possibility of signal transmission through a chain of Chua's circuits, each one operating in a chaotic-regime, is investigated. The propagation of an analog signal through a nearly synchronized chain is studied. As we increase the linear coupling resistance between cells, the chaotic noise is found to increase and propagate through the cells. This phenomenon is exploited in a new method for transmitting digital signals with a noise reduction circuit. We also present results on signal transmission delay. One of the most interesting results reported is our demonstration that it is possible under certain conditions to recover a binary signal even if no synchronization exists between cells.

The paper describes an analog current mode realization of Discrete-Time Cellular Neural Networks (DTCNNs) with high cell density, which have local analog and local logic memory. Hence, some important parts of the CNN Universal Machine concept are implemented. The computation speed can be adjusted simply to the application by changing the clock rate. The circuit components are described in detail and SPICE level 2 simulation results are given for the ORBIT 2.0 /spl mu/m process. A layout has been designed for a chip with 12 by 12 cells on a square grid realizing a one-neighborhood with 9 feedback and 9 control coefficients. The cell size is 619 /spl mu/m by 425 /spl mu/m and the simulated speed is between 1 MHz and 10 MHz depending on the minimum value of the state current. For the latter this leads to a simulated performance of 25.9 10/sup 9/ XPS for a single chip operation with an effective area of 0.379 cm/sup 2/ and a worst case power consumption of 0.86 W. Another important feature of the chip is its capability for a spatial cascaded connection.>

The various special features of cellular neural networks are presented. It is stated what has been achieved so far and what future work is still needed in order to obtain a truly universal building block for information processing systems.>

A new method is given, which converts a chaotic motion in Chua's circuit to a periodic motion. A tunnel mechanism is used to perform this conversion.>

In this paper, we demonstrate how Yamakawa's chaotic chips and Chua's circuits can be used to implement a secure communication system based on chaotic modulation/demodulation systems. Furthermore, their performance for the secure communication is discussed.>

The twist-and-flip circuit contains only three circuit elements: two linear capacitors connected across the ports of a gyrator characterized by a nonlinear gyration conductance function g(v/sub 1/, v/sub 2/). When driven by a square-wave voltage source of amplitude a and frequency omega , the resulting circuit is described by a system of two nonautonomous state equations. For almost any choice of nonlinear g(v/sub 1/, v/sub 2/)>0, and over a very wide region of the a- omega parameter plane, the twist-and-flip circuit is imbued with the full repertoire of complicated chaotic dynamics typical of those predicted by the classic KAM theorem from Hamiltonian dynamics. The significance of the twist-and-flip circuit is that its associated nonautonomous state equations have an explicit Poincare map, called the twist-and-flip map, thereby making it possible to analyze and understand the intricate dynamics of the system, including its many fractal manifestations. The focus is on the many fractals associated with the twist-and-flip circuit.>

Provides an overview of the technical articles and features presented in this issue.

An electronic instrument for displaying any perspective of a three-dimensional surface S generated by three time-varying (not necessarily periodic) signals is described. The surface S is a three-dimensional Lissajous figure which need not be a closed curve as is typical of all strange attractors. This analog (not digital) instrument is designed to rotate S along any axis (not just the X-, Y-, Z-axis) through any prescribed solid angles (0°-360°) in the three-dimensional coordinate system in real time. The instrument works as a preprocessor for a standard oscilloscope and is built with components capable of displaying time-varying signals with a frequency spectrum from 0 to 20 kHz. To illustrate some immediate applications of this instrument, strange attractors associated with both autononmus and nonautonomous circuits are presented in many different perspectives and cross sections. In particular, numerous cross sections of these strange attractors which have never been seen before can be easily displayed in any desired perspective in real time. Such cross sections have proved to be most revealing and invaluable in dissecting and uncovering the fine structures of strange attractors.

This tutorial presents an in-depth introduction to chaos in dynamical systems, and presents several practical techniques for recognizing and classifying chaotic behavior. These techniques include the poincaré map, Lyapunov exponents, capacity, information dimension, correlation dimension, Lyapunov dimension, and the reconstruction of attractors from a single time series.

An integrated software toolkit for the analysis of nonlinear dynamical systems is introduced. This user-friendly, graphically oriented collection of interactive programs includes software that calculates and displays trajectories, bifurcation diagrams, and two-dimensional phase portraits. Also included are programs that locate periodic solutions, calculate and display invariant manifolds of two-dimensional Poincaré maps, as well as compute Lyapunov exponents, Lyapunov dimension, fractal dimension, information dimension, and correlation dimension. The toolkit runs under both the UNIX and PC-DOS operating systems.

A special-purpose analog computer made of switched-capacitor circuits is presented for analyzing chaos and bifurcation phenomena in nonlinear discrete dynamical systems modeled by discrete maps xn + 1= f(xn) Experimental results are given for four switched-capacitor circuits described by well-known discrete maps; namely, the logistic map, the piecewise-linear unimodal (one-hump) map, the Hénon map, and the Lozi map.