VLDB 2026 Research / reviewers in the wild / expert
Don J. Hanrahan
dblp:04/1526
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 50% Integrated circuit design · 50% | |
| Theoretical computer science
1 paper |
Algorithms and data structures · 50% Logic in computer science · 50% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
arithmetic unit |
0.0 | 1 | 1989 | A General Proof for Overlapped Multiple-Bit Scanning Multiplications · IEEE Trans. Computers 1989 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1989 | A General Proof for Overlapped Multiple-Bit Scanning Multiplications · IEEE Trans. Computers 1989 |
Algorithms and data structures › algebraic computation
arithmetic algorithms |
0.0 | 1 | 1989 | A General Proof for Overlapped Multiple-Bit Scanning Multiplications · IEEE Trans. Computers 1989 |
Logic in computer science › formal methods
correctness proofs |
0.0 | 1 | 1989 | A General Proof for Overlapped Multiple-Bit Scanning Multiplications · IEEE Trans. Computers 1989 |
Methods — techniques the papers use, named apart from their topics
two's-complement representation · 0.0generalized correctness proof · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1989 | A General Proof for Overlapped Multiple-Bit Scanning MultiplicationsabstractBecause of recent advances in technology, multibit scanning implementations can be considered that exceed three-bit and four-bit groupings. The generalized proof for the multibit overlapped scanning multiplication is introduced, and the multiplication process is discussed. The proofs are intended to establish the correctness of the decode and the actions taken to produce the multiplication of any valid scheme proposed in the past, and to dictate the correct decode and actions taken for any overlapped s-bit scanning algorithm such that s is a natural number greater than or equal to two. The multiplication is considered to be between two fractional numbers, which are represented in two's-complement form.> Stamatis Vassiliadis, Eric M. Schwarz, Don J. Hanrahan |
IEEE Trans. Computers | 3 |