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Chen Zheng 0001

dblp:04/3239-1 · DBLP profile ↗
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5ranked-venue papers
1as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Artificial intelligence and machine learning · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Systems and software security · 61% Hardware security and side channels · 30% Cryptographic primitives and cryptanalysis · 9%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 91% Cloud and datacenter computing · 9%

Topics — the 5 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Systems and software security › memory safety
control-flow integrity
0.412019
RAGuard: An Efficient and User-Transparent Hardware Mechanism against ROP Attacks · ACM Trans. Archit. Code Optim. 2019
Systems and software security
return-oriented programming defense
0.412019
RAGuard: An Efficient and User-Transparent Hardware Mechanism against ROP Attacks · ACM Trans. Archit. Code Optim. 2019
Performance modeling and evaluation
benchmarking
0.212014
BigDataBench: A big data benchmark suite from internet services · HPCA 2014
Performance modeling and evaluation › workload characterization
big data workload characterization
0.212014
BigDataBench: A big data benchmark suite from internet services · HPCA 2014
Performance modeling and evaluation
workload characterization
0.212014
BigDataBench: A big data benchmark suite from internet services · HPCA 2014

Methods — techniques the papers use, named apart from their topics

true random number generator · 0.4physical unclonable function · 0.4MAC binding · 0.4microarchitecture characterization · 0.2cache miss analysis · 0.2
YearPublicationVenuePosition
2021 AIBench Training: Balanced Industry-Standard AI Training Benchmarking
abstract
Earlier-stage evaluations of a new AI architecture/system need affordable AI benchmarks. Only using a few AI component benchmarks like MLPerf alone in the other stages may lead to misleading conclusions. Moreover, the learning dynamics are not well understood, and the benchmarks' shelf-life is short. This paper proposes a balanced benchmarking methodology. We use real-world benchmarks to cover the factors space that impacts the learning dynamics to the most considerable extent. After performing an exhaustive survey on Internet service AI domains, we identify and implement nineteen representative AI tasks with state-of-the-art models. For repeatable performance ranking (RPR subset) and workload characterization (WC subset), we keep two subsets to a minimum for affordability. We contribute by far the most comprehensive AI training benchmark suite. The evaluations show: (1) AIBench Training (v1.1) outperforms MLPerf Training (v0.7) in terms of diversity and representativeness of model complexity, computational cost, convergent rate, computation, and memory access patterns, and hotspot functions; (2) Against the AIBench full benchmarks, its RPR subset shortens the benchmarking cost by 64%, while maintaining the primary workload characteristics; (3) The performance ranking shows the single-purpose AI accelerator like TPU with the optimized TensorFlow framework performs better than that of GPUs while losing the latter's general support for various AI models. The specification, source code, and performance numbers are available from the AIBench homepage https://www.benchcouncil.org/aibench-training/index.html.
Fei Tang 0003, Wanling Gao, Jianfeng Zhan, Chuanxin Lan, Lei Wang 0004, Chunjie Luo, Zheng Cao 0003, Xingwang Xiong, Zihan Jiang 0006, Tianshu Hao, Fanda Fan, Fan Zhang 0047, Yunyou Huang, Jianan Chen 0003, Mengjia Du, Chen Zheng 0001, Daoyi Zheng, Haoning Tang, Kunlin Zhan, Defei Kong, Chongkang Tan, Xinhui Tian, Yatao Li, Junchao Shao, Xiaoyu Wang 0002, Jiahui Dai, Hainan Ye
ISPASS18
2019 RAGuard: An Efficient and User-Transparent Hardware Mechanism against ROP Attacks
abstract
Control-flow integrity (CFI) is a general method for preventing code-reuse attacks, which utilize benign code sequences to achieve arbitrary code execution. CFI ensures that the execution of a program follows the edges of its predefined static Control-Flow Graph: any deviation that constitutes a CFI violation terminates the application. Despite decades of research effort, there are still several implementation challenges in efficiently protecting the control flow of function returns (Return-Oriented Programming attacks). The set of valid return addresses of frequently called functions can be large and thus an attacker could bend the backward-edge CFI by modifying an indirect branch target to another within the valid return set. This article proposes RAGuard, an efficient and user-transparent hardware-based approach to prevent Return-Oreiented Programming attacks. RAGuard binds a message authentication code (MAC) to each return address to protect its integrity. To guarantee the security of the MAC and reduce runtime overhead: RAGuard (1) computes the MAC by encrypting the signature of a return address with AES-128, (2) develops a key management module based on a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG), and (3) uses a dedicated register to reduce MACs’ load and store operations of leaf functions. We have evaluated our mechanism based on the open-source LEON3 processor and the results show that RAGuard incurs acceptable performance overhead and occupies reasonable area.
Rui Hou 0001, Wei Song 0002, Sally A. McKee, Zhen Jia 0001, Chen Zheng 0001, Mingyu Chen 0001, Lixin Zhang 0002, Dan Meng 0002
ACM Trans. Archit. Code Optim.6
2018 Data motifs: a lens towards fully understanding big data and AI workloads
abstract
The complexity and diversity of big data and AI workloads make understanding them difficult and challenging. This paper proposes a new approachto modelling and characterizing big data and AI workloads. We consider each big data and AI workload as a pipeline of one or more classes of units of computation performed on different initial or intermediate data inputs. Each class of unit of computation captures the common requirements while being reasonably divorced from individual implementations, and hence we call it a data motif. For the first time, among a wide variety of big data and AI workloads, we identify eight data motifs that take up most of the run time of those workloads, including Matrix, Sampling, Logic, Transform, Set, Graph, Sort and Statistic. We implement the eight data motifs on different software stacks as the micro benchmarks of an open-source big data and AI benchmark suite --- BigDataBench 4.0 (publicly available from http://prof.ict.ac.cn/BigDataBench), and perform comprehensive characterization of those data motifs from perspective of data sizes, types, sources, and patterns as a lens towards fully understanding big data and AI workloads. We believe the eight data motifs are promising abstractions and tools for not only big data and AI benchmarking, but also domain-specific hardware and software co-design.
Wanling Gao, Jianfeng Zhan, Lei Wang 0004, Chunjie Luo, Daoyi Zheng, Fei Tang 0003, Biwei Xie, Chen Zheng 0001, Xiwen He, Hainan Ye
PACT8
2018 XOS: An Application-Defined Operating System for Datacenter Computing
abstract
Rapid growth of datacenter (DC) scale, urgency of cost control, increasing workload diversity, and huge software investment protection place unprecedented demands on the operating system (OS) efficiency, scalability, performance isolation, and backward-compatibility. The traditional OSes are not built to work with deep-hierarchy software stacks, large numbers of cores, tail latency guarantee, and increasingly rich variety of applications seen in modern DCs, and thus they struggle to meet the demands of such workloads. This paper presents XOS, an application-defined OS for modern DC servers. Our design moves resource management out of the OS kernel, supports customizable kernel subsystems in user space, and enables elastic partitioning of hardware resources. Specifically, XOS leverages modern hardware support for virtualization to move resource management functionality out of the conventional kernel and into user space, which lets applications achieve near bare-metal performance. We implement XOS on top of Linux to provide backward compatibility. XOS speeds up a set of DC workloads by up to 1.6× over our baseline Linux on a 24-core server, and outperforms the state-of-the-art Dune by up to 3.3× in terms of virtual memory management. In addition, XOS demonstrates good scalability and strong performance isolation.
Chen Zheng 0001, Lei Wang 0004, Sally A. McKee, Lixin Zhang 0002, Hainan Ye, Jianfeng Zhan
IEEE BigData1
2014 BigDataBench: A big data benchmark suite from internet services
abstract
As architecture, systems, and data management communities pay greater attention to innovative big data systems and architecture, the pressure of benchmarking and evaluating these systems rises. However, the complexity, diversity, frequently changed workloads, and rapid evolution of big data systems raise great challenges in big data benchmarking. Considering the broad use of big data systems, for the sake of fairness, big data benchmarks must include diversity of data and workloads, which is the prerequisite for evaluating big data systems and architecture. Most of the state-of-the-art big data benchmarking efforts target evaluating specific types of applications or system software stacks, and hence they are not qualified for serving the purposes mentioned above. This paper presents our joint research efforts on this issue with several industrial partners. Our big data benchmark suite-BigDataBench not only covers broad application scenarios, but also includes diverse and representative data sets. Currently, we choose 19 big data benchmarks from dimensions of application scenarios, operations/ algorithms, data types, data sources, software stacks, and application types, and they are comprehensive for fairly measuring and evaluating big data systems and architecture. BigDataBench is publicly available from the project home page http://prof.ict.ac.cn/BigDataBench. Also, we comprehensively characterize 19 big data workloads included in BigDataBench with varying data inputs. On a typical state-of-practice processor, Intel Xeon E5645, we have the following observations: First, in comparison with the traditional benchmarks: including PARSEC, HPCC, and SPECCPU, big data applications have very low operation intensity, which measures the ratio of the total number of instructions divided by the total byte number of memory accesses; Second, the volume of data input has non-negligible impact on micro-architecture characteristics, which may impose challenges for simulation-based big data architecture research; Last but not least, corroborating the observations in CloudSuite and DCBench (which use smaller data inputs), we find that the numbers of L1 instruction cache (L1I) misses per 1000 instructions (in short, MPKI) of the big data applications are higher than in the traditional benchmarks; also, we find that L3 caches are effective for the big data applications, corroborating the observation in DCBench.
Lei Wang 0004, Jianfeng Zhan, Chunjie Luo, Yuqing Zhu 0001, Qiang Yang 0012, Yongqiang He, Wanling Gao, Zhen Jia 0001, Yingjie Shi, Chen Zheng 0001, Kent Zhan, Bizhu Qiu
HPCA11