The paper presents a new method to provide simultaneous time and frequency offset estimation that operates in the frequency domain by analyzing the modulus and angle of a synchronization symbol. When compared to those estimators based on computational intensive time-correlations, the main advantage of the proposed estimator is in the hardware implementation. In the proposed method, no additional hardware is required, as the already existing FFT processor and the polar coordinates translator (typically a CORDIC processor) used for OFDM normal operation are reused in the synchronization phase. Simulation results are presented using different conditions and channel models showing a negligible decrease in performance when compared to other methods.

A CAD tool for analog circuit synthesis is presented. This tool, called FASY, uses fuzzy-logic based reasoning to select one topology among a fixed set of alternatives. For the selected topology, a two-phase optimizer sizes all elements to satisfy the performance constraints minimizing a cost function. In FASY, the decision rules used in the topology selection process are introduced by an expert designer or automatically generated by means of a learning process that uses the optimizer mentioned above. The capability of learning topology selection rules by experience, is unique in FASY. Practical examples demonstrate the tool ability of this tool to learn topology selection rules and to synthesize analog cells with different circuit topologies.

This paper presents a fuzzy-logic based approach to circuit performance modeling. Starting from a set of input-output vectors obtained by simulation (the training set), an automatic process adapts model parameters by means of neurofuzzy techniques. The resulting model can accurately reproduce the training set, even for a moderate number of rules. The results obtained in several analog and digital examples, show that accurate models can be obtained with a simple, completely automatic process. To demonstrate the usefulness of the proposed model, it is used to evaluate the circuit performances in the optimization process of an analog cell, achieving considerable speed-up.

Although many design tools have been developed for digital design, analog design tools are just being introduced. This paper deals with device sizing of analog cells. A new method using the Tabu Search heuristic is proposed. It minimizes a given cost function, which depends on a set of designer specifications. The results obtained show that this method can approach very close the global minimum of the cost function with only a few number of iterations. Hence, an analog simulation program, such as SPICE, can be used for the evaluation of the cost function at each iteration.>

This paper presents a tool for the automatic selection of circuit topology in analog synthesis. This tool uses fuzzy rules in the selection process. The decision rules can be entered by a human expert or can be automatically generated by means of a learning process. The capability of learning from previous experience in analog design is unique in this tool. Practical examples demonstrate its ability to select a topology in the design of CMOS operational amplifiers, and to learn the decision rules from experience.>