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Michael J. Beckerle

dblp:05/1093 · DBLP profile ↗
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5ranked-venue papers
1as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 77% High-performance computing · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
parallel programming models and runtimes
0.011993
T: integrated building blocks for parallel computing · SC 1993
High-performance computing › supercomputing
supercomputing systems
0.011993
T: integrated building blocks for parallel computing · SC 1993

Methods — techniques the papers use, named apart from their topics

integrated building blocks · 0.0
YearPublicationVenuePosition
2012 Brief Announcement: Fast Travellers: Infrastructure-Independent Deadlock Resolution in Resource-restricted Distributed Systems
Sebastian Ertel, Christof Fetzer, Michael J. Beckerle
DISC3
1995 START-NG: Delivering Seamless Parallel Computing
Derek Chiou, Boon Seong Ang, Robert Greiner, Arvind 0001, James C. Hoe, Michael J. Beckerle, James E. Hicks, G. Andrew Boughton
Euro-Par6
1993 T: integrated building blocks for parallel computing
abstract
Article T: integrated building blocks for parallel computing Share on Authors: G. M. Papadopoulos Lab for Comp. Sci., MIT 545 Technology Square, Cambridge, MA Lab for Comp. Sci., MIT 545 Technology Square, Cambridge, MAView Profile , G. A. Boughton Lab for Comp. Sci., MIT 545 Technology Square, Cambridge, MA Lab for Comp. Sci., MIT 545 Technology Square, Cambridge, MAView Profile , R. Greiner Motorola, Motorola, Inc., DW220, 2900 South Diablo Way, Tempe, AZ Motorola, Motorola, Inc., DW220, 2900 South Diablo Way, Tempe, AZView Profile , M. J. Beckerle Motorola, Motorola Cambridge Research Center, One Kendall Square, Bld 200, Cambridge, MA Motorola, Motorola Cambridge Research Center, One Kendall Square, Bld 200, Cambridge, MAView Profile Authors Info & Claims Supercomputing '93: Proceedings of the 1993 ACM/IEEE conference on SupercomputingDecember 1993 Pages 624–635https://doi.org/10.1145/169627.169811Online:01 December 1993Publication History 20citation170DownloadsMetricsTotal Citations20Total Downloads170Last 12 Months4Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
Gregory M. Papadopoulos, G. Andrew Boughton, Robert Greiner, Michael J. Beckerle
SC4
1991 Test and Validation for Monsoon Processing Elements
abstract
An aggressive, integrated hardware/software approach for the test and validation of Monsoon processing elements is developed. The strategy comprises three main elements: scan-paths of internal processor state, gate-level simulator of the entire processing element for hardware timing verification, and a novel table-driven instruction-level interpreter. Each of these elements is detailed, and it is shown how they contribute to design, test, validation, and debug.>
Michael J. Beckerle, Gregory M. Papadopoulos
ICCD1
1991 Overview of the Monsoon Project
abstract
Monsoon is an experimental multi-threaded multiprocessor targeted to large-scale, general purpose scientific and symbolic computations. In particular, Monsoon is designed for the efficient execution of code compiled from Id, a high-level, implicitly parallel declarative language. Monsoon is a product of a multiyear cooperative research and development program between the Massachusetts Institute of Technology (MIT) and Motorola, Inc., which, in turn is an outgrowth of over ten years of research in dynamic dataflow architectures and languages conducted at MIT. The intent is to provide an overall view of the Monsoon hardware and software system architecture. In addition, the run-time system and emulator are detailed.>
Kenneth R. Traub, Gregory M. Papadopoulos, Michael J. Beckerle, James E. Hicks
ICCD3