Stephen S. Bullock

dblp:05/1779 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Emerging computing paradigms · 80% Electronic design automation · 20%
Theoretical computer science
1 paper
Quantum computing and quantum information · 100%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms › quantum computer architecture
quantum circuit synthesis
0.122006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
An arbitrary twoqubit computation In 23 elementary gates or less · DAC 2003
Emerging computing paradigms
quantum computer architecture
0.122006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
An arbitrary twoqubit computation In 23 elementary gates or less · DAC 2003
Electronic design automation
logic synthesis
0.112006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Quantum computing and quantum information › quantum circuit
quantum circuit design
0.012003
An arbitrary twoqubit computation In 23 elementary gates or less · DAC 2003
Quantum computing and quantum information › quantum gates
quantum gate synthesis
0.012003
An arbitrary twoqubit computation In 23 elementary gates or less · DAC 2003
Emerging computing paradigms
quantum computing
0.012006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Emerging computing paradigms › quantum computer architecture › quantum circuit optimization
quantum gate optimization
0.012006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006

Methods — techniques the papers use, named apart from their topics

spectral decomposition · 0.1polar decomposition · 0.1lie theory · 0.1KAK decomposition · 0.1shannon decomposition · 0.1quantum multiplexor · 0.1nearest-neighbor gate mapping · 0.1
YearPublicationVenuePosition
2006 Synthesis of quantum-logic circuits
abstract
The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits (Proc. R. Soc. Lond. A, Math. Phys. Sci., vol. 425, p. 73, 1989) to the attention of the electronic design automation community (Proc. 40th ACM/IEEE Design Automation Conf., 2003), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 68, p. 012318, 2003), (Proc. 41st Design Automation Conf., 2004), (Proc. 39th Design Automation Conf., 2002), (Proc. Design, Automation, and Test Eur., 2004), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 69, p. 062321, 2004), (IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, p. 710, 2003). Efficient quantum-logic circuits that perform two tasks are discussed: 1) implementing generic quantum computations, and 2) initializing quantum registers. In contrast to conventional computing, the latter task is nontrivial because the state space of an n-qubit register is not finite and contains exponential superpositions of classical bitstrings. The proposed circuits are asymptotically optimal for respective tasks and improve earlier published results by at least a factor of 2. The circuits for generic quantum computation constructed by the algorithms are the most efficient known today in terms of the number of most expensive gates [quantum controlled-NOTs (CNOTs)]. They are based on an analog of the Shannon decomposition of Boolean functions and a new circuit block, called quantum multiplexor (QMUX), which generalizes several known constructions. A theoretical lower bound implies that the circuits cannot be improved by more than a factor of 2. It is additionally shown how to accommodate the severe architectural limitation of using only nearest neighbor gates, which is representative of current implementation technologies. This increases the number of gates by almost an order of magnitude, but preserves the asymptotic optimality of gate counts.
Vivek V. Shende, Stephen S. Bullock, Igor L. Markov
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2005 Synthesis of quantum logic circuits
abstract
The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits to the attention of the EDA community [10, 17, 4, 16, 9]. We discuss efficient circuits to initialize quantum registers and implement generic quantum computations. Our techniques yield circuits that are twice as small as the best previously published technique. Moreover, a theoretical lower bound shows that our new circuits can be improved by at most a factor of two. Further, the circuits grow by at most a factor of nine under severe architectural restrictions.
Vivek V. Shende, Stephen S. Bullock, Igor L. Markov
ASP-DAC2
2004 Smaller Two-Qubit Circuits for Quantum Communication and Computation
abstract
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to library-less logic synthesis, we consider circuits and gates in terms of the underlying model of quantum computation, and do not assume any particular technology. As increasing the number of qubits can be prohibitively expensive, we assume throughout that no extra qubits are available for temporary storage. Using quantum circuit identities, we improve an earlier lower bound of 17 elementary gates by Bullock and Markov to 18, and their upper bound of 23 elementary gates to 18. We also improve upon the generic circuit with six CNOT gates by Zhang et al. (our circuit uses three), and that by Vidal and Dawson with 11 basic gates (we use 10). We study the performance of our synthesis procedures on two-qubit operators that are useful in quantum algorithms and communication protocols. With additional work, we find small circuits and improve upon previously known circuits in some cases.
Vivek V. Shende, Igor L. Markov, Stephen S. Bullock
DATE3
2003 An arbitrary twoqubit computation In 23 elementary gates or less
abstract
Quantum circuits currently constitute a dominant model for quantum computation [14]. Our work addresses the problem of constructing quantum circuits to implement an arbitrary given quantum computation, in the special case of two qubits. We pursue circuits without ancilla qubits and as small a number of elementary quantum gates [1, 9] as possible. Our lower bound for worst-case optimal two-qubit circuits calls for at least 17 gates: 15 one-qubit rotations and 2 CNOTs. To this end, we constructively prove a worstcase upper bound of 23 elementary gates, of which at most 4 (CNOTs) entail multi-qubit interactions. Our analysis shows that previously known synthesis algorithms, although more general, entail much larger quantum circuits than ours in the special case of two qubits. One such algorithm [4] has a worst case of 61 gates of which 18 may be CNOTs. Our techniques rely on the KAK decomposition from Lie theory as well as the polar and spectral (symmetric Shur) matrix decompositions from numerical analysis. They are related to the canonical decomposition of a two-qubit gate with respect to the "magic basis" of phase-shifted Bell states [11, 12]. We extend this decomposition in terms of elementary gates for quantum computation.
Stephen S. Bullock, Igor L. Markov
DAC1