This work in progress research-to-practice paper presents the initial results of a study carried out at our university among lecturers, aimed at determining how the perception of training needs have changed due to the pandemic, and if this change can be used to increase enrollment in the university training program. Pedagogical training of university lecturers has usually been a self-training process guided by their own beliefs about what good teaching is, and the self-perception of one's own strengths and weaknesses with respect to teaching. The COVID-19 pandemic shook the world in many ways, but it also challenged lecturers about their own convictions regarding educational methodologies, evaluation and their own approach to teaching, so it is a great opportunity for change.

This research paper for the practice of work-in-progress presents the training activities designed for students of a new PhD program in Engineering Education. These activities are based on the study of the training courses of five Engineering Education PhD programs, and on the literature concerning PhD training challenges. A set of competencies to be acquired is first defined; then the training activities are designed by means of a SPOOC (Self-Paced Open Online Course) in order to guide the acquisition of these competencies. The SPOOC is currently under design, taking an initial cohort of 9 students as an experimental group.

The field of Engineering Education (EngEd) is a relatively new discipline that is attracting a growing interest all around the world. Despite this interest in research in EngEd, there are still only a few PhD programmes in the area, the oldest being that established in 2004 at Purdue University. Although some research groups exist in Europe, to our knowledge there are only three PhD programmes: those in Aalborg, Chalmers and Uppsala. The Universitat Politècnica de Catalunya – Barcelona Tech is a technical University providing degrees only in engineering, sciences and architecture. We have a strong commitment to high-quality education and face the same problems as other technical universities, such as the need to increase student attraction and retention, the development of an engineering identity and the acquisition of the professional competencies required in a global world. While we have been developing research in all those subjects, our next goal is to create a new PhD programme in Engineering, Science and Technology Education, with the first cohort due to begin in September, 2020. The structure of an EngEd PhD programme consists of a unique combination of engineering and education requirements. In order to design our program, we analysed the training courses offered by five programs (at Aalborg, Chalmers, Purdue, Uppsala, and Virginia Tech). This paper presents what we have learnt about the courses and learning objectives of those programmes.

This work in progress research-to-practice paper presents the analysis of the experience in the first four years of the lecturer training program developed at UPC-BarcelonaTech. The program, called Postgraduate Degree in University Teaching in STEM, started in September 2015. The program was designed based on the competencies a lecturer should possess with a special emphasis on developing a project to help lecturers to change the way they work on the teaching-learning process with their students. After four years of experience with the program, it is necessary to perform a critical analysis of the results, to find out what worked and what needs to be changed. This paper presents this analysis and the lessons learned in the process, as well as the changes required to increase the quality of the program as well as its attractiveness to lecturers.

This Research to Practice Work in Progress paper presents the work conducted on the use of the Sustainability Map of Bachelor Engineering Degrees (a tool developed by the EDINSOST project) to analyze how Sustainable Development Goals (SDGs) are developed in each Degree. Over recent years, there has been a growth in the importance of working sustainability based on the SDGs. To identify which learning objective of each SDG corresponds to each learning outcome of the EDINSOST Sustainability Map, a correspondence matrix has been defined. The matrix contains the learning outcomes of the EDINSOST Sustainability Map in its rows, and the 17 SDGs in the columns. The cells of the matrix contain the learning objectives of the SDGs that correspond to each learning outcome of the EDINSOST Sustainability Map. This work in progress presents the first results of the process of mapping the SDGs into the EDINSOST Sustainability Map of Engineering Bachelor Degrees. Early results show that some of the 169 learning objectives are not applicable to Engineering Degrees. Likewise, we have seen that learning objectives have been defined more for policy makers than for engineers, and therefore adaptation is not an easy task. However, the work done has helped us to verify that the EDINSOST Sustainability Map can help in the introduction of the SDGs into the curriculum.

This Innovative Practice Work in Progress Paper presents a pilot test designed to train university students of engineering degrees (mentors) to advise and guide students aged between 15 and 16 (mentees) in technological fields in different teaching centers in Catalonia. The first results suggest the high interest shown by the group in the talks of the mentors; a greater attention and predisposition of the male students are observed in the questions and interventions. The sensitization of the female group on STEM issues is surprising, although there is a low participation and interest shown by the topics discussed. All these aspects must be taken into account in the planning of future interventions.

One of the desirable features of quality teaching is individualized attention to students. In this work we present a teaching innovation of individualized support called Just-in-Time-Teaching (JiTT). We describe a pilot experience conducted in a laboratory group and two control groups of the Computer Science Fundamentals subject of bachelor's degrees in industrial engineering at the Barcelona East School of Engineering [EEBE] of the Universitat Politècnica de Catalunya in the first semester of 2016-2017 academic year. In this subject it has been observed that students tend to do fewer exercises than are required. They usually do them in the vicinity of the exams rather than throughout the course, and this has an impact on their learning and their academic performance. The aim of the experience was therefore to improve academic performance and student satisfaction, and to reduce absenteeism. In the JiTT group, exercises were collected via a virtual campus and assessed before the next laboratory class. Data of the university entrance grade, age and origin of the students were collected. The results are presented and compared with the those obtained in the control groups. Significant improvements were found in the final grades and in student satisfaction with the teaching, and absenteeism was reduced. In conclusion, this is a promising method that promotes individualized teaching at a reasonable cost for the teaching staff.

This paper presents a tool developed to help engineers to design and develop sustainable projects. The tool has been designed to introduce and evaluate the sustainability of engineering projects in general, but here we show its application to assess the final project of an engineering degree. This tool is a guide for students to introduce and estimate the sustainability of their projects, but it also helps teachers to assess them. The tool is based on the Socratic Methodology and consists of a matrix where each cell contains several questions that students must consider during the project development and which they must answer in their project report. A positive or negative mark is assigned to every cell, and the sum of all marks states the project sustainability. However, the result is not as simplistic as a final number, but a descriptive sustainability analysis where questions are answered and every mark justified. A pilot test with some students has obtained good results, but the first Final Degree Project using this methodology will be read in July 2016.

A survey we conducted a few years ago concluded that higher education teachers should have the following competences: interpersonal, methodological, communicative, planning and management, teamwork and innovation. The authors of this work belong to the Institute in charge of the lecturer-training program at our university, which is basically a technical one. In order to improve our training program, we pose the following research questions: What are the competences that lecturers perceive as less important. Do our university teachers (engineering teachers) have a different perception of the importance of the different lecturer competences compared to that of other teachers? The results we present in this paper come from a survey that was sent to a total of 15,209 teachers belonging to public universities in our community, and we received a total of 2,347 valid answers. As a result of this study, we found which competences are those with a significantly bad rating by lecturers in general, and our lecturers in particular. We analyze what measures should be introduce into our teacher-training program.

The introduction of sustainability skills into higher education curricula is a natural effect of the increasing importance of sustainability in our daily lives. Topics like green computing, sustainable design or environmental engineering have become part of the knowledge required by today's engineers. Furthermore, we strongly believe that the introduction of this skill will eventually enable future engineers to develop sustainable products, services and projects. The Final Year Project is the last academic stage facing students and a step towards their future professional engineering projects. As such, it constitutes a rehearsal for their professional future and an ideal opportunity for reflecting on whether their Final Year Project is sustainable or not, and to what extent. It also provides a good tool for reviewing the lessons learned about sustainability during the degree course and for applying them in a holistic and integrated way. In this paper, we present a guide that allows both students and advisors to think carefully about the sustainability of engineering projects, in particular the Final Year Project.

In this paper, we present a methodology for Final Year Project (FYP) monitoring and assessment that considers the inclusion of the professional skills required in the particular engineering degree. This proper monitoring and clear evaluation framework provides the student with valuable support for the project implementation as well as for improving the quality of the projects, thereby reducing the academic drop-out rate. The proposed methodology has been implemented at the Barcelona School of Informatics at the Universität Politècnica de Catalunya - BarcelonaTech. The FYP is structured around three milestones: project definition, project monitoring and project completion. Skills are assigned to each milestone according to the tasks required in that phase, and a list of indicators is defined for each phase. The evaluation criteria for each indicator at each phase are specified in a rubric, and are made public both to students and teachers. Thus, the FYP includes an exhaustive evaluation method distributed throughout the whole project implementation, thereby facilitating project organization for the student as well as providing a clear and homogeneous assessment framework. The methodology for the FYP organization, assessment and evaluation was launched and piloted over two semesters. We believe the experience to be general in the sense that it has been conducted as part of an ICT engineering degree, but may easily be extended to any other engineering degree.

In the context of the European Higher Education Area, curriculum design needs to be based on the defined competencies of each degree programs, including both domain-specific and professional competencies. In this educational context, developing students' professional skills poses a new challenge we need to face. The present work proposes a model to globally develop professional skills in an Engineering degree program. Based on competency maps, this model allows careful analysis, revision and iteration for an effective integration of professional skills. We define each competency in terms of "dimensions" (or sub-skills), which are further defined according to three-level objectives. Competency maps are built showing the specific graded objectives, which allows to integrate them most finely into degree subjects. A global competency map is also designed including the objectives to be achieved throughout the degree. This global map becomes a useful tool for curriculum designers and coordinators. It allows them to optimize the workload, and to make adjustments most effectively, helping students develop the defined competencies as a global comprehensive experience. To illustrate our model, we explain how it has been implemented to integrate "Communication skills" into subjects, and how the model has been applied to assess "Appropriate attitude towards work" skills.

It has been shown that CS majors collaborate too little while there is also a concern that students engage in "unwanted collaboration" i.e. cheating. We re-examine the cheating-collaboration border to see if we can improve collaboration without facilitating cheating.

To study the differences of the CS Education and Research communities we have studied the collaboration networks of 6 CS Education conferences and 7 CS Research conferences. Results show that both communities behave differently when collaborating to create technical papers. It could be said that the CS Education community has introversion traits: there is a higher tendency to only collaborate with nearby colleagues.

Professional Skills, such as the ability to communicate effectively or the ability to gather and integrate information, are not easy to teach or to assess. A traditional exam is not the best way of assessing these skills because it is limited both by time and by the resources students are able to consult. Moreover, in a traditional exam it is difficult to assess if professional skills have been acquired in depth. In this paper we propose to substitute the traditional exam by a take-home exam in which students have more time to solve the questions and are not restricted by the sources they can consult, thereby providing a highly educational task in which students experience a deep learning process. We also analyze what kind of questions should be asked to evaluate professional skills, as well as analyzing the potential drawbacks of these kind of exams (such as inappropriate student behavior). Finally, we show the results of one subject at the Barcelona School of Informatics, in which the take-home exam replaced the traditional exam. This course has been taught over 11 terms with good results.

This paper presents a proposal to develop “Sustainability and Social Commitment" skills (SSC) in engineering degree curricula. The proposal is based on providing general education in SSC to teachers (in particular, the relationship between SSC and their field of knowledge) and SSC-related material for each subject, as well as developing learning and assessment methods for these skills. Unlike other proposals advocating the existence of a few specific subjects that include SSC, the authors propose to integrate these skills into different subjects throughout the curriculum. The existence of a global mechanism for the coordination and assessment of SSC skills is also proposed. Finally, the paper explains the introduction of SSC into the Barcelona School of Informatics Computing Engineering Degree at the Technical University of Catalonia (UPC- BarcelonaTECH), providing examples of how to deal with SSC within the subjects of the degree. While the experience is based on a Computing Degree, the ideas and methodology can be extended to other technical studies.

Loops are the main time-consuming part of numerical applications. The performance of the loops is limited either by the resources offered by the architecture or by recurrences in the computation. To execute more operations per cycle, current processors are designed with growing degrees of resource replication (replication technique) for memory ports and functional units. However, the high cost in terms of area and cycle time of this technique precludes the use of high degrees of replication. High values for the cycle time may clearly offset any gain in terms of number of execution cycles. High values for the area may lead to an unimplementable configuration. An alternative to resource replication is resource widening (widening technique), which has also been used in some recent designs in which the width of the resources is increased (i.e., a single operation is performed over multiple data). Moreover, several general-purpose superscalar microprocessors have been implemented with multiply-add fused floating-point units (fusion technique), which reduces the latency of the combined operation and the number of resources used. The authors evaluate a broad set of VLIW processor design alternatives that combine the three techniques. We perform a technological projection for the next processor generations in order to foresee the possible implementable alternatives. From this study, we conclude that if the cost is taken into account, combining certain degrees of replication and widening in the hardware resources is more effective than applying only replication. Also, we confirm that multiply-add fused units will have a significant impact in raising the performance of future processor architectures with a reasonable increase in cost.

Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the resources offered by the architecture. Several general-purpose superscalar microprocessors have been implemented with multiply-add fused floating-point units, that reduces the latency of the combined operation and the number of resources used. This paper analyses the influence of these two factors in the instruction-level parallelism exploitable from loops executed on a broad set of future aggressive processor configurations. The estimation of implementation costs (area and cycle time) enables a fair comparison of these configurations in terms of final performance and implementation feasibility. The paper performs technological projection for the next years in order to foresee the possible implementable alternatives. From this study we conclude that multiply-add fused units may have a deep impact in raising the performance of future processor architectures with a reasonable increase in cost.

The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers to investigate aggressive techniques for exploiting program parallelism at the lowest level. To execute more operations per cycle, many processors are designed with growing degrees of resource replication (buses and functional units). However the high cost in terms of area and cycle time of this technique precludes the use of high degrees of replication. An alternative to resource replication is resource widening, that has also been used in some recent designs, in which the width of the resources is increased. In this paper we evaluate a broad set of design alternatives that combine both replication and widening. For each alternative we perform an estimation of the ILP limits (including the impact of spill code for several register file configurations) and the cost in terms of area and access time of the register file. We also perform a technological projection for the next 10 years in order to foresee the possible implementable alternatives. From this study we conclude that if the cost is taken into account, the best performance is obtained when combining certain degrees of replication and widening in the hardware resources. The results have been obtained from a large number of inner loops from numerical programs scheduled for VLIW architectures.

Article Increasing memory bandwidth with wide buses: compiler, hardware and performance trade-offs Share on Authors: David López Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, Spain Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, SpainView Profile , Mateo Valero Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, Spain Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, SpainView Profile , Josep Llosa Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, Spain Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, SpainView Profile , Eduard Ayguadé Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, Spain Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya, Campus Nord, Mòdul D6, Jordi Girona 1-3, 08034 Barcelona, SpainView Profile Authors Info & Claims ICS '97: Proceedings of the 11th international conference on SupercomputingJuly 1997 Pages 12–19https://doi.org/10.1145/263580.263585Online:11 July 1997Publication History 10citation232DownloadsMetricsTotal Citations10Total Downloads232Last 12 Months1Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access