Two tightly coupled multi-computer testbeds, one providing efficient inter-node communications tailored to the application, and the other providing more flexible full connectivity among processors and memories are used to support validation of the design techniques for distributed real-time systems. The testbeds are valuable tools for evaluating, analyzing, and studying the behavior of many algorithms for distributed systems. We have used the testbeds in studying distributed recovery block scheme for handling hardware and software faults. A testbed has also been used to analyze database locking techniques and a fault-tolerant locking protocol for recovery from faults that occur during updating of replicated copies of files in tightly coupled distributed systems. Testbeds can be configured to represent the operating environments and input scenarios more accurately than software simulation. Therefore, testbed-based evaluation provides more accurate results than simulation and yields greater insight into the characteristics and limitations of proposed concepts. This is an important advantage in the complex field of distributed real-time system design evaluation and validation. Therefore, testbed-based experimentation is an effective approach to validate system concepts and design techniques for distributed systems for real-time applications.

This paper describes the concept of a highly flexible distributed testbed to support the analysis, test, evaluation, and demonstration of advanced data processing research for ballistic missile defense. Categories of research and experimentation at the system, unit, and device levels are discussed; major testbed elements are described; and the levels of experimental data processing modeling are defined. Hardware considerations are discussed for establishing the computational resources and interconnect mechanisms to: (1) support simulation of weapon system processes and the external system, environment, and threat; (2) emulate tactical data processors at levels of detail ranging from the gate level to the network level; and (3) accommodate the evaluation and demonstration of laboratory model hardware and software. The basic structure and architecture of the testbed are described.