Christos Pavlatos

dblp:06/2467 · DBLP profile ↗
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7ranked-venue papers
2as first author
2since 2021 · last 2025
0000-0002-5057-1720ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 2 · 1 first-authorSecurity and privacy · 2 · 2 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author
YearPublicationVenuePosition
2025 Integrated Tracking and Peripheral Vision in a UAV Architecture for Search-and-Rescue Operations: Workshop Paper
abstract
This paper presents a novel processing architecture for unmanned aerial vehicles (UAVs), designed to support small search-and-rescue teams operating in post-disaster environments. The proposed system consists of two main components. The primary component is dedicated to vehicle and person detection and tracking. It utilizes a Raspberry Pi 5 paired with a Coral TPU Accelerator to process input from the UAV's main camera, leveraging a YOLOv11n neural network and the KCF tracking algorithm. This capability is essential for following the rescue team's vehicle and locating survivors. When a network connection is available, this subsystem transmits captured images to a remote server for further analysis. The secondary component is a peripheral vision subsystem, powered by a Raspberry Pi Zero 2 W. It processes input from four peripheral cameras connected to a Luxonis OAK-FFC-4P board. It is tasked with identifying critical conditions and communicating the findings to the main processing unit, which in turn alerts the operator. Once appropriate instructions are received, the UAV is redirected to the specified location to perform a focused search for survivors.
Odysseas Ntousis, Evangelos Makris, Ioannis Poulakis, Panayiotis Tsanakas, Christos Pavlatos
SRDS5
2025 Enhancing Airport Safety Through Real-Time Detection of Personnel Near Aircraft Using Machine Learning
abstract
The increasing movement of personnel and vehicles in airport taxiway areas raises the risk of ground accidents involving aircraft. This paper presents a real-time, camera-based monitoring system designed to prevent such incidents by detecting personnel in proximity to aircraft and issuing timely alerts. The proposed solution integrates advanced computer vision techniques with a client-server architecture, where a lightweight edge device transmits captured frames to a remote server for intensive processing. The system (i) detects aircraft, (ii) detects personnel, (iii) calculates the distance between each aircraft and the camera, (iv) calculates the distance between each detected person and the camera, and (v) calculates the 3D distance between aircraft and personnel. In case a person is identified within a predefined safety radius around an aircraft, an audio alarm is immediately triggered to warn ground staff. Experimental results demonstrate that the system achieves an accuracy of$\mathbf{9 5 \%}$in calculating the aircraft-to-person distance. By combining machine learning, real-time processing, and automated hazard evaluation, the system reduces reliance on human observation, minimizes the risk of human error, and enhances overall airport ground safety. The complete pipeline achieves a frame processing rate of approximately 16 frames per second, ensuring timely and continuous monitoring of fast-moving targets.
Theodoros Theocharis, Evangelos Makris, Georgios Fotis, Christos Pavlatos
SRDS4
2017 Hardware Inexact Grammar Parser
abstract
In this paper, a platform is presented, that given a Stochastic Context-Free Grammar (SCFG), automatically outputs the description of a parser in synthesizable Hardware Description Language (HDL) which can be downloaded in an FPGA (Field Programmable Gate Arrays) board. Although the proposed methodology can be used for various inexact models, the probabilistic model is analyzed in detail and the extension to other inexact schemes is described. Context-Free Grammars (CFG) are augmented with attributes which represent the probability values. Initially, a methodology is proposed based on the fact that the probabilities can be evaluated concurrently with the parsing during the parse table construction by extending the fundamental parsing operation proposed by Chiang & Fu. Using this extended operation, an efficient architecture is presented based on Earley’s parallel algorithm, which given an input string, generates the parse table while evaluating concurrently the probabilities of the generated dotted grammar rules in the table. Based on this architecture, a platform has been implemented that automatically generates the hardware design of the parser given a SCFG. The platform is suitable for embedded systems applications where a natural language interface is required or in pattern recognition tasks. The proposed hardware platform has been tested for various SCFGs and was compared with previously presented hardware parser for SCFGs based on Earley’s parallel algorithm. The hardware generated by the proposed platform is much less complicated than the one of comparison and succeeds a speed-up of one order of magnitude.
Alexandros C. Dimopoulos, Christos Pavlatos, George K. Papakonstantinou
Int. J. Pattern Recognit. Artif. Intell.2
2016 A General Purpose Branch and Bound Parallel Algorithm
abstract
In this paper a parallel algorithm for branch and bound applications is proposed. The algorithm is a general purpose one and it can be used to parallelize effortlessly any sequential branch and bound style algorithm, that is written in a certain format. It is a distributed dynamic scheduling algorithm, i.e. each node schedules the load of its cores, it can be used with different programming platforms and architectures and is a hybrid algorithm (OpenMP, MPI). To prove its validity and efficiency the proposed algorithm has been implemented and tested with numerous examples in this paper that are described in detail. A speed-up of about 9 has been achieved for the tested examples, for a cluster of three nodes with four cores each.
Alexandros C. Dimopoulos, Christos Pavlatos, George K. Papakonstantinou
PDP2
2016 Parallel Hardware Stochastic Context-Free Parsers
abstract
In this paper a platform is presented, that given a stochastic context-free grammar (SCFG), automatically outputs the description of the parser in synthesizable hardware description language (HDL) which can be downloaded in an Field Programmable Gate Arrays (FPGA) board. Initially, according to our methodology the SCFG is augmented with attributes which store the probability values and can be evaluated through corresponding stack actions. The architecture of the produced system is based on a proposed extension of Earley’s parallel algorithm, which given an input string, generates the parse trees in the form of an AND-Or parse tree. This AND-or parse tree is then traversed using a proposed tree traversal technique in order to execute the corresponding actions in the correct order, so as to compute the necessary probabilities. The platform is suitable for embedded systems applications where a natural language interface is required or in pattern recognition tasks. The parser generated by the presented platform has been tested for various SCFGs and compared to software approaches. The performance comparison is one to two orders of magnitude in favor of the presented hardware, compared to previous software approaches, depending on the application, the input string length and the number of produced trees.
Christos Pavlatos, Alexandros C. Dimopoulos, George K. Papakonstantinou
Int. J. Pattern Recognit. Artif. Intell.1
2010 A platform for the automatic generation of attribute evaluation hardware systems
Alexandros C. Dimopoulos, Christos Pavlatos, George K. Papakonstantinou
Comput. Lang. Syst. Struct.2
2009 Efficient reconfigurable embedded parsers
Christos Pavlatos, Alexandros C. Dimopoulos, Andrew Koulouris, Theodore Andronikos, Ioannis Panagopoulos, George K. Papakonstantinou
Comput. Lang. Syst. Struct.1