VLDB 2026 Research / reviewers in the wild / expert
Minhui Xie
dblp:06/5769
· DBLP profile ↗
19ranked-venue papers
5as first author
16since 2021 · last 2026
0000-0001-6684-8336ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 13 · 3 first-author · 12 since 2021Software engineering, systems software and programming languages · 6 · 1 first-author · 4 since 2021Databases, data management, data science and information retrieval · 6 · 2 first-author · 6 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | MI-LLM: Multiplier-Free LLM Inference on Commodity Processing-in-Memory HardwareabstractLarge language models (LLMs) are prominent for their superior ability in language understanding and generation. However, a notorious problem for LLM inference is low computational utilization caused by the memory bottleneck, since it typically requires large memory capacity and high bandwidth to process neural weights. By integrating processing cores into memory, Processing-In-Memory (PIM) architecture excels at alleviating memory bottleneck; with the recent release of the first commodity near-bank PIM hardware (NBP), PIM becomes off-the-shelf and shows great potential for accelerating LLM inference practically. However, simply shoehorning LLM inference on NBP can not achieve satisfactory performance due to its inherent limitations: weak compute performance, frequent cache misses caused by the limited working memory capacity, and poor inter-PIM-core communication bandwidth. To address these limitations, we propose MI-LLM, an efficient system deploying LLM inference on NBP hardware. Its key idea is to build NBP-aware Lookup Tables (LUTs) and completely replace multiplications with lookups on LUTs, thereby mitigating the limitation of weak compute performance. 1) To reduce the model accuracy drop caused by the use of LUT, MI-LLM tailors a learning-based LUT construction method to maintain the model accuracy. 2) To cope with frequent cache misses caused by LUT sizes far exceeding PIM working memory capacity, MI-LLM introduces the design of PIM-aware linear kernel, with the optimization of intra-row and inter-row reordering enabled, to enhance LUT lookup locality. 3) MI-LLM further proposes a model partitioning scheme to minimize inter-PIM-core communication. Kernel-level benchmarks reveal that MI-LLM achieves a 9% throughput improvement and an 11% increase in energy efficiency over GPU implementations. Compared to FP8 quantization, MI-LLM incurs only a 0.24 times increase in perplexity, demonstrating minimal accuracy degradation. Moreover, in our end-to-end evaluation, MI-LLM requires 80% fewer ALU operation ticks per output token than the GPU baseline. Puyun Hu, Minhui Xie, Linjiang Li, Kuiyaohui Zhang, Erge Xiang, Jing Wang 0055, Size Zheng 0001, Xiao Zhang 0001, Yunpeng Chai |
IEEE Trans. Computers | 2 |
| 2025 | Frugal: Efficient and Economic Embedding Model Training with Commodity GPUsabstractEmbedding models show superiority in learning representations of massive ID-type features in sparse learning scenarios such as recommendation systems (e.g., user/item IDs) and graph learning (e.g., node/edge IDs). Commodity GPUs are highly favored for their cost-efficient computing power, which is ideally suited for the low computing demand of memory-intensive embedding models. However, directly running embedding model training on commodity GPUs yields poor performance because of their deficient communication resources (including low communication bandwidth and no PCIe P2P support). Minhui Xie, Shaoxun Zeng, Youyou Lu |
ASPLOS (1) | 1 |
| 2025 | Medusa: Accelerating Serverless LLM Inference with MaterializationabstractServerless is a promising paradigm to provide scalable, cost-efficient, and easy-to-use model inference services. However, the cold start of model inference functions requires loading models to the devices, which incurs high latencies and undermines the benefits of serverless computing. In LLMs, things get even worse since two extra stages are introduced: a KV cache initialization stage that profiles and anticipates memory reservation for KV cache, and a capturing stage which dynamically constructs CUDA graphs for different batch sizes. Both stages are paramount to the inference performance, but become the main culprit of cold start latency. Shaoxun Zeng, Minhui Xie, Youmin Chen, Youyou Lu |
ASPLOS (1) | 2 |
| 2025 | Hierarchical Superpixel Segmentation via Structural Information TheoryabstractSuperpixel segmentation is a foundation for many higher-level computer vision tasks, such as image segmentation, object recognition, and scene understanding. Existing graph-based superpixel segmentation methods typically concentrate on the relationships between a given pixel and its directly adjacent pixels while overlooking the influence of non-adjacent pixels. These approaches do not fully leverage the global information in the graph, leading to suboptimal segmentation quality. To address this limitation, we present SIT-HSS, a hierarchical superpixel segmentation method based on structural information theory. Specifically, we first design a novel graph construction strategy that incrementally explores the pixel neighborhood to add edges based on 1-dimensional structural entropy (1D SE). This strategy maximizes the retention of graph information while avoiding an overly complex graph structure. Then, we design a new 2D SE-guided hierarchical graph partitioning method, which iteratively merges pixel clusters layer by layer to reduce the graph’s 2D SE until a predefined segmentation scale is achieved. Experimental results on three benchmark datasets demonstrate that the SIT-HSS performs better than state-of-the-art unsupervised superpixel segmentation algorithms. The source code is available at https://github.com/SELGroup/SIT-HSS. Minhui Xie, Hao Peng 0001, Guangjie Zeng, Shuhai Wang, Jia Wu 0001, Peng Li 0075, Philip S. Yu |
SDM | 1 |
| 2025 | GPREEMPT: GPU Preemptive Scheduling Made General and Efficient
Ruwen Fan, Tingxu Ren, Minhui Xie, Jiwu Shu, Youyou Lu |
USENIX ATC | 3 |
| 2025 | Turbocharge ANNS on Real Processing-in-Memory by Enabling Fine-Grained Per-PIM-Core Scheduling
Puqing Wu, Minhui Xie, Enrui Zhao, Yunpeng Chai |
USENIX ATC | 2 |
| 2025 | High-Throughput, Cost-Effective Billion-Scale Vector Search with a Single GPUabstractApproximate nearest neighbor search (ANNS) is broadly adopted in numerous scenarios. Real-world applications seek efficient ways to search billion-scale vectors in high throughput. On-SSD graph-based ANNS systems have the opportunity to achieve this goal, but the limited CPU computing power becomes a bottleneck. In this paper, we propose a GPU-centric, CPU-assisted ANNS architecture and design GustANN, a billion-scale graph-based vector search system for high throughput and cost-effectiveness. We achieve these goals with three techniques: (1) memory-efficient GPU kernels optimized to minimize the GPU memory usage in the graph search, which allows higher concurrency for GPU and SSD; (2) CPU-assisted transfer to address the PCIe bandwidth bottleneck on the GPU-side; (3) pivot search for inter-SSD load balancing. Compared to existing ANNS systems, GustANN achieves at least 2.50× higher throughput, and is 2.62× more cost-effective (measured in /QPS). Haodi Jiang, Minhui Xie, Jiwu Shu, Youyou Lu |
Proc. ACM Manag. Data | 3 |
| 2025 | Understanding Robustness Issues of Updatable Learned Indexes: [Experiments & Analysis]abstractLearned indexes are viewed as promising substitutes for traditional indexes due to their excellent performance, especially in read-only workloads. Previous studies have shown that updatable learned indexes perform exceptionally well in many cases, suggesting they are nearly ready for real-world applications. However, unlike traditional indexes such as B+tree and ART, updatable learned indexes are prone to instability of real-time trained models, resulting in inherently uncertain structures. This raises skepticism about their robustness, hindering their broader adoption. In this paper, we conduct a systematic benchmark and analysis to address this concern, corroborating doubts about the lack of robustness in state-of-the-art updatable learned indexes. We demonstrate that, contrary to previous findings, updatable learned indexes cannot robustly surpass traditional indexes, even losing their expected advantage under read-intensive workloads. We further reveal the root causes, including overfitted models, unbalanced structures, ineffective adjustments, and excessive space reservation. In addition, we explore potential mitigation methods to address these challenges. We hope our findings will highlight the critical importance of robustness in the design of updatable learned indexes, ultimately paving the way for their real-world adoption. Yuanhui Luo, Minhui Xie, Yiheng Tong, Shichao Jiang, Yunpeng Chai |
Proc. ACM Manag. Data | 2 |
| 2024 | MaxEmbed: Maximizing SSD bandwidth utilization for huge embedding models servingabstractDeep learning recommendation models (DLRMs) have gained widespread application across search, advertising, and e-commerce. Still, DLRMs present notable challenges as they depend heavily on large embedding tables to represent sparse features in recommendation systems. This raises concerns about both memory capacity and cost. Solid-state drives (SSDs) offer a cost-effective solution with a significantly larger capacity, but they introduce read amplification issues because of the mismatch between embedding size and SSD read granularity. Prior SSD embedding storage systems aim to tackle these challenges by employing hypergraph partitioning to co-locate co-appearing embeddings onto the same SSD page, alleviating read amplification. However, this approach has a drawback as it divides embeddings into completely disjoint clusters, limiting potential combinations between embeddings. Ruwen Fan, Minhui Xie, Haodi Jiang, Youyou Lu |
ASPLOS (4) | 2 |
| 2023 | Mobius: Fine Tuning Large-Scale Models on Commodity GPU ServersabstractFine-tuning on cheap commodity GPU servers makes large-scale deep learning models benefit more people. However, the low inter-GPU communication bandwidth and pressing communication contention on the commodity GPU server obstruct training efficiency. Yangyang Feng, Minhui Xie, Zijie Tian, Youyou Lu, Jiwu Shu |
ASPLOS (2) | 2 |
| 2023 | Citron: Distributed Range Lock Management with One-sided RDMA
Youyou Lu, Minhui Xie, Qing Wang 0031, Jiwu Shu |
FAST | 3 |
| 2023 | Patronus: High-Performance and Protective Remote Memory
Youyou Lu, Qing Wang 0031, Minhui Xie, Jiwu Shu |
FAST | 4 |
| 2023 | PetPS: Supporting Huge Embedding Models with Persistent MemoryabstractEmbedding models are effective for learning high-dimensional sparse data. Traditionally, they are deployed in DRAM parameter servers (PS) for online inference access. However, the ever-increasing model capacity makes this practice suffer from both high storage costs and long recovery time. Rapidly developing Persistent Memory (PM) offers new opportunities to PSs owing to its large capacity at low costs, as well as its persistence, while the application of PM also faces two challenges including high read latency and heavy CPU burden. To provide a low-cost but still high-performance parameter service for online inferences, we introduce PetPS, the first production-deployed PM parameter server. (1) To escape with high PM latency, PetPS introduces a PM hash index tailored for embedding model workloads, to minimize PM access. (2) To alleviate the CPU burden, PetPS offloads parameter gathering to NICs, to avoid CPU stalls when accessing parameters on PM and thus improve CPU efficiency. Our evaluation shows that PetPS can boost throughput by 1.3 -- 1.7X compared to PSs that use state-of-the-art PM hash indexes, or get 2.9 -- 5.5X latency reduction with the same throughput. Since 2020, PetPS has been deployed in Kuaishou, one world-leading short video company, and successfully reduced TCO by 30% without performance degradation. Minhui Xie, Youyou Lu, Qing Wang 0031, Yangyang Feng, Jiaqiang Liu, Jiwu Shu |
Proc. VLDB Endow. | 1 |
| 2022 | Fleche: an efficient GPU embedding cache for personalized recommendationsabstractDeep learning based models have dominated current production recommendation systems. However, the gap between CPU-side DRAM data accessing and GPU processing still impedes their inference performance. GPU-resident cache can bridge this gap, but we find that existing systems leave the benefits to cache the embedding table, a huge sparse structure, on GPU unexploited. In this paper, we present Fleche, a holistic cache scheme with detailed designs for efficient GPU-resident embedding caching. Fleche (1) uses one cache backend for all embedding tables to improve the total cache utilization, and (2) merges small kernel calls into one unitary call to reduce the overhead of kernel maintenance (e.g., kernel launching and synchronizing). Furthermore, we carefully design the cache query workflow for finer-grain parallelism. Evaluations with real-world datasets show that compared with the prior art, Fleche significantly improves the throughput of embedding layer by 2.0 -- 5.4×, and gets up to 2.4× speedup of end-to-end inference throughput. Minhui Xie, Youyou Lu, Jiazhen Lin, Qing Wang 0031, Jiwu Shu |
EuroSys | 1 |
| 2022 | Pacman: An Efficient Compaction Approach for Log-Structured Key-Value Store on Persistent Memory
Jing Wang 0158, Youyou Lu, Qing Wang 0031, Minhui Xie, Keji Huang, Jiwu Shu |
USENIX ATC | 4 |
| 2022 | Nap: Persistent Memory Indexes for NUMA ArchitecturesabstractWe present Nap , a black-box approach that converts concurrent persistent memory (PM) indexes into non-uniform memory access (NUMA)-aware counterparts. Based on the observation that real-world workloads always feature skewed access patterns, Nap introduces a NUMA-aware layer (NAL) on the top of existing concurrent PM indexes, and steers accesses to hot items to this layer. The NAL maintains (1) per-node partial views in PM for serving insert/update/delete operations with failure atomicity and (2) a global view in DRAM for serving lookup operations. The NAL eliminates remote PM accesses to hot items without inducing extra local PM accesses. Moreover, to handle dynamic workloads, Nap adopts a fast NAL switch mechanism. We convert five state-of-the-art PM indexes using Nap . Evaluation on a four-node machine with Optane DC Persistent Memory shows that Nap can improve the throughput by up to 2.3× and 1.56× under write-intensive and read-intensive workloads, respectively. Qing Wang 0031, Youyou Lu, Minhui Xie, Jiwu Shu |
ACM Trans. Storage | 4 |
| 2020 | Kraken: memory-efficient continual learning for large-scale real-time recommendationsabstractModern recommendation systems in industry often use deep learning (DL) models that achieve better model accuracy with more data and model parameters. However, current opensource DL frameworks, such as TensorFlow and PyTorch, show relatively low scalability on training recommendation models with terabytes of parameters. To efficiently learn large-scale recommendation models from data streams that generate hundreds of terabytes training data daily, we introduce a continual learning system called Kraken. Kraken contains a special parameter server implementation that dynamically adapts to the rapidly changing set of sparse features for the continual training and serving of recommendation models. Kraken provides a sparsity-aware training system that uses different learning optimizers for dense and sparse parameters to reduce memory overhead. Extensive experiments using real-world datasets confirm the effectiveness and scalability of Kraken. Kraken can benefit the accuracy of recommendation tasks with the same memory resources, or trisect the memory usage while keeping model performance. Minhui Xie, Youyou Lu, Guangxu Yang, Qingxing Xu, Bihai Wu, Jiazhen Lin, Hongbo Ao, Wanhong Xu, Jiwu Shu |
SC | 1 |
| 2007 | Fine-grain analysis of common coupling and its application to a Linux case study
Dror G. Feitelson, Tokunbo O. S. Adeshiyan, Daniel Balasubramanian, Yoav Etsion, Gabor Madl, Esteban Osses, Sameer Singh 0001, Karlkim Suwanmongkol, Minhui Xie, Stephen R. Schach |
J. Syst. Softw. | 9 |
| 2007 | Common coupling and pointer variables, with application to a Linux case study
Stephen R. Schach, Tokunbo O. S. Adeshiyan, Daniel Balasubramanian, Gabor Madl, Esteban Osses, Sameer Singh 0001, Karlkim Suwanmongkol, Minhui Xie, Dror G. Feitelson |
Softw. Qual. J. | 8 |