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Stuart W. Daniel

dblp:07/6261 · DBLP profile ↗
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5ranked-venue papers
2as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 2 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Interconnection networks and networks-on-chip · 90% Parallel and multicore computing · 6% Performance modeling and evaluation · 4%

Topics — the 5 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › switching network
hybrid switching
0.021996
Analysis and Implementation of Hybrid Switching · IEEE Trans. Computers 1996
Analysis and implementation of hybrid switching · ISCA 1995
Interconnection networks and networks-on-chip › switching
switching scheme
0.021996
Analysis and Implementation of Hybrid Switching · IEEE Trans. Computers 1996
Analysis and implementation of hybrid switching · ISCA 1995
Interconnection networks and networks-on-chip
router architecture
0.021999
A Router Architecture for Flexible Routing and Switching in Multihop Point-To-Point Networks · IEEE Trans. Parallel Distributed Syst. 1999
Analysis and implementation of hybrid switching · ISCA 1995
Interconnection networks and networks-on-chip › router architecture
router microarchitecture
0.011996
Analysis and Implementation of Hybrid Switching · IEEE Trans. Computers 1996
Performance modeling and evaluation › simulation › architectural simulation
cycle-accurate simulation
0.011996
Analysis and Implementation of Hybrid Switching · IEEE Trans. Computers 1996

Methods — techniques the papers use, named apart from their topics

cycle-level simulation · 0.1wormhole switching · 0.0virtual cut-through · 0.0packet switching · 0.0
YearPublicationVenuePosition
1999 A Router Architecture for Flexible Routing and Switching in Multihop Point-To-Point Networks
abstract
Modern parallel and distributed applications have a wide range of communication characteristics and performance requirements. These diverse characteristics affect the performance and suitability of particular routing and switching policies in multihop point-to-point networks. In this paper, we identify a core set of architectural features necessary for flexible selection and implementation of multiple routing and switching schemes. Using this, we present a flexible router whose routing and switching policies can be tailored to the application, allowing the network to meet these diverse needs. By dedicating a small programmable processor to each incoming link, we can implement wormhole, virtual cut-through, and packet switching, as well as hybrid switching schemes, each under a variety of unicast and multicast routing algorithms. In addition, a flexible router can support several applications or traffic types simultaneously, enabling better support of applications with multiple traffic classes. We have designed, implemented, and fabricated the Programmable Routing Controller (PRG). Cycle-level simulations of mesh-connected PRCs also demonstrate that flexible routing and switching can significantly enhance application performance.
Stuart W. Daniel, Kang G. Shin, Sang Kyun Yun
IEEE Trans. Parallel Distributed Syst.1
1996 Analysis and Implementation of Hybrid Switching
abstract
The switching scheme of a point-to-point network determines how packets flow through each node, and is a primary element in determining the network's performance. In this paper, we present and evaluate a new switching scheme called hybrid switching. Hybrid switching dynamically combines both virtual cut-through and wormhole switching to provide higher achievable throughput than wormhole alone, while significantly reducing the buffer space required at intermediate nodes when compared to virtual cut-through. This scheme is motivated by a comparison of virtual cut-through and wormhole switching through cycle-level simulations, and then evaluated using the same methods. To show the feasibility of hybrid switching, as well as to provide a common base for simulating and implementing a variety of routing and switching schemes, we have designed SPIDER, a communication adapter built around a custom ASIC called the programmable routing controller (PRC).
Kang G. Shin, Stuart W. Daniel
IEEE Trans. Computers2
1995 A programmable routing controller for flexible communications in point-to-point networks
abstract
Modern parallel and distributed applications have a wide range of communication characteristics and performance requirements. This paper presents programmable routing controller (PRC), a custom ASIC that supports flexible network policies to accommodate diverse application requirements. By dedicating a small programmable processor to each incoming link, the PRC can implement wormhole, virtual cut-through, and packet switching, as well as hybrid schemes, under a variety of unicast and multicast routing algorithms. The PRC can support several applications or traffic types simultaneously by implementing multiple routing-switching microcode routines.
Stuart W. Daniel, Jennifer Rexford, James W. Dolter, Kang G. Shin
ICCD1
1995 Analysis and implementation of hybrid switching
abstract
The switching scheme of a point-to-point network determines how packets flow through each node, and is a primary element in determining the network's performance. In this paper, we present and evaluate a new switching scheme called hybrid switching. Hybrid switching dynamically combines both virtual cut-through and wormhole switching to provide higher achievable throughput than wormhole alone, while significantly reducing the buffer space required at intermediate nodes when compared to virtual cut-through. This scheme is motivated by a comparison of virtual cut-through and wormhole switching through cycle-level simulations, and then evaluated using the same methods. To show the feasibility of hybrid switching, as well as to provide a common base for simulating and implementing a variety of switching schemes, we have designed SPIDER, a communication adapter built around a custom ASIC, the Programmable Routing Controller (PRC).
Kang G. Shin, Stuart W. Daniel
ISCA2
1994 SPIDER: Flexible and Efficient Communication Support for Point-to-Point Distributed Systems
abstract
SPIDER is a network adapter that provides scalable communication support for point-to-point distributed systems. The device exports an efficient interface to the host processor, provides transparent support for dependable, time-constrained communication, and handles packet routing and switching. The communication support provided by SPIDER exploits concurrency between the independent data channels feeding the point-to-point network, and offers flexible and transparent hardware mechanisms. SPIDER allows the host to exercise fine-grain control over its operation, enabling the latter to monitor and influence data transmission and reception efficiently. In the current implementation, SPIDER interfaces to the Ironics IV-3207, a VMEbus-based 68040 card and will be controlled by x-kernel, a communication executive allowing the flexible composition of communication protocols.>
James W. Dolter, Stuart W. Daniel, Ashish Mehra, Jennifer Rexford, Wu-chang Feng, Kang G. Shin
ICDCS2