The application of the fast simulated diffusion (FSD) algorithm as a practical method of motor dynamical parameter identification with a multiminima cost function is presented. The effectiveness of this parameter optimization technique in obtaining global minimum estimates of the motor shaft friction and load inertia is demonstrated in the simple case of a high performance brushless servodrive system (BLMDS) over a response surface with embedded local extrema. The restriction of the search procedure to quantized step sizes in parameter space, due to noisy 'local' minima proliferation near the global extremum is examined. The accuracy of the FSD search method in acquiring the global minimum parameter estimates with remote initialization is demonstrated by the use of step response current feedback, responsible for genuine local minima plurality, in the objective function formulation. The necessity for a good physical model of the BLMDS with nonlinear inverter delay operation as part of the identification strategy is briefly discussed. Frequency and phase coherence of the step response BLMDS current feedback with model simulation, using returned FSD parameter estimates, attest to FSD convergence accuracy which validates this parameter identification method.

A circuit design for a Field Programmable Analog Array is presented which improves accuracy and repeatability compared to previous designs. Controlled by a configuration register, continuous-time signals are routed among programmable analog blocks to implement the user's chosen circuit. The configurable connections are realized by CMOS switches and a new innovation is that these are either buffered or nulled to cancel parasitic error. The function blocks are Op-Amps combined with passive networks which allow programmable transfer functions with accuracy insensitive to variations in process parameters and environment. The intended application area is the rapid development of analog circuits which are presently prototyped by PCBs stuffed with Op-Amp and passive components. The concept has been demonstrated on a CMOS IC and the resulting performance shows the feasibility of this approach to general purpose FPAA technology.

A method of modeling the distributed source and drain resistance effects in MOS transistors is discussed. Simulations performed using this technique are validated by comparisons with purpose-built structures. The method is then used to examine a problem which arises with the use of a high-temperature interconnect in three-dimensional silicon-on-insulator technologies. The results show how the resistivity of the interconnect affects the performance of the substrate devices of this technology, and the benefits achievable through further development of the existing interconnect technologies are outlined. Finally, the procedure is used to examine the effect of reduced contact size on standard MOS devices, and results wh1ich give general guidelines to the extent of the effect are presented.>