Demo Data from VLDB 2026 / reviewers in the wild / expert
Stephen A. Ward
dblp:08/3963
· DBLP profile ↗
6ranked-venue papers
2as first author
0since 2021 · last 1998
0000-0003-2954-4071ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 1 first-authorSoftware engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Integrated circuit design · 49% Parallel and multicore computing · 35% Interconnection networks and networks-on-chip · 8% | |
| Software engineering, system software, and programming languages
1 paper |
Programming languages and type systems · 50% Concurrent programming · 50% |
Topics — the 9 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1988 | A Solution to a Special Case of the Synchronization Problem · IEEE Trans. Computers 1988 |
Parallel and multicore computing
synchronization |
0.0 | 1 | 1988 | A Solution to a Special Case of the Synchronization Problem · IEEE Trans. Computers 1988 |
Integrated circuit design › digital circuit design › sequential circuit design
synchronizer |
0.0 | 1 | 1988 | A Solution to a Special Case of the Synchronization Problem · IEEE Trans. Computers 1988 |
Programming languages and type systems
language semantics |
0.0 | 1 | 1980 | A Syntactic Theory of Message Passing · J. ACM 1980 |
Concurrent programming
message passing |
0.0 | 1 | 1980 | A Syntactic Theory of Message Passing · J. ACM 1980 |
Processor architecture and microarchitecture
multiprocessor architecture |
0.0 | 1 | 1980 | The Munet: A Scalable Decentralized Architecture For Parallel Computers · ISCA 1980 |
Interconnection networks and networks-on-chip
multiprocessor interconnection |
0.0 | 1 | 1980 | The Munet: A Scalable Decentralized Architecture For Parallel Computers · ISCA 1980 |
Parallel and multicore computing › multiprocessor system
scalable multiprocessor |
0.0 | 1 | 1980 | The Munet: A Scalable Decentralized Architecture For Parallel Computers · ISCA 1980 |
Parallel and multicore computing › parallel computing
multiprocessing |
0.0 | 1 | 1980 | A Syntactic Theory of Message Passing · J. ACM 1980 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1998 | Towards Bayanihan: building an extensible framework for volunteer computing using JavaabstractProject Bayanihan seeks to develop the idea of volunteer computing, which allows people to very easily pool together their computers′ processing power and co-operate in solving parallel problems. While the idea of volunteer computing offers many exciting new prospects in global supercomputing and collaboration, its realization involves many challenging research issues that need to be addressed. In this paper, we present a flexible object-oriented framework using Java and HORB that allows programmers to experiment with different approaches to these issues by simply extending and interconnecting basic library components. We also present results from a distributed web-crawling application written using the framework. © 1998 John Wiley & Sons, Ltd. Luis F. G. Sarmenta, Satoshi Hirano, Stephen A. Ward |
Concurr. Pract. Exp. | 3 |
| 1995 | Rational clocking [digital systems design]abstractCommunication between independently-clocked digital subsystems typically involves a finite probability of synchronization failure whose minimization introduces delays and consequent performance costs. This paper explores a technique that eliminates both the inherent unreliability of such communication and the performance overhead it implies. Our approach maintains a known phase relationship, between clocks whose frequencies are related by a rational factor, and exploits the predictability of their relative phases to algorithmically time communications without run-time arbitration contests. Luis F. G. Sarmenta, Gill A. Pratt, Stephen A. Ward |
ICCD | 3 |
| 1988 | Set-associative dynamic random access memoryabstractStatic-column dynamic RAMs (random-access memories) offer fast access to successive locations within a single row, a fact which has been used in their implementation in fast cacheless memory systems. Such caches are necessarily nonassociative (direct-mapped), limiting their performance relative to set-associative caches of similar total capacity. The authors describe an architecture for dynamic RAM chips which circumvents this limitation by providing several alternative static row buffers on each chip. Cacheless memory systems utilizing these devices are able to achieve the performance characteristics of relatively expensive set-associative cached memories using only economical high-density RAM parts. Simulation results on set-associate dynamic RAMs (SADRAMs) are presented and some plausible roles for SADRAMs in various architectural contexts are noted.> Stephen A. Ward, Robert C. Zak |
ICCD | 1 |
| 1988 | A Solution to a Special Case of the Synchronization ProblemabstractA synchronizer that exhibits an arbitrarily low failure rate and a short propagation delay for the special case of synchronizing a signal that is synchronous with some periodic signal is described.> William K. Stewart, Stephen A. Ward |
IEEE Trans. Computers | 2 |
| 1980 | The Munet: A Scalable Decentralized Architecture For Parallel ComputersabstractThe MuNet is a multiprocessor architecture which can be program-transparently scaled over a very wide cost-performance spectrum. Each processor in a MuNet communicates directly only with a limited number ofneighbors..There is no shared memory, central broadcast medium, or other hardware resource shared equally by all processors In the system. This strictly local communication and interconnection strategy means that only a constant amount of additional hardware need be added for each new processor incorporated into the system. Robert H. Halstead Jr., Stephen A. Ward |
ISCA | 2 |
| 1980 | A Syntactic Theory of Message PassingabstractRecent developments by Hewitt and others have stimulated interest in message-passing constructs as an alternative to the more conventional applicative semantics on which most current languages are based. The present work illuminates the distinction between applicative and message-passing semantics by means of the μ -calculus, a syntactic model of message-passing systems similar in mechanism to the λ-calculus. Algorithms for the translation of expressions from the λ- to the μ -calculus are presented, and differences between the two approaches are discussed. Message-passing semantics seem particularly applicable to the study of multiprocessing. The μ -calculus, through the mechanism of conduits, provides a simple model for a limited but interesting class of parallel computations. Multiprocessing capabilities of the μ -calculus are illustrated, and multiple-processor implementations are discussed briefly. Stephen A. Ward, Robert H. Halstead Jr. |
J. ACM | 1 |