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Andreas Zinn

dblp:08/4374 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2003
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
functional verification		 0.012003
Re-use-centric architecture for a fully accelerated testbench environment · DAC 2003
Electronic design automation
hardware verification and test		 0.012003
Re-use-centric architecture for a fully accelerated testbench environment · DAC 2003
Electronic design automation › hardware verification and test › functional verification
emulation		 0.012003
Re-use-centric architecture for a fully accelerated testbench environment · DAC 2003
YearPublicationVenuePosition
2003 Re-use-centric architecture for a fully accelerated testbench environment
abstract
This paper presents a new technology that accelerates functional system verification. Starting with a behavioral testbench, we developed a seamless flow to generate a re-use-oriented architecture for a synthesizable testbench without loosing compatibility towith the original testbench. Consequently, we combine the flexibility of a behavioral testbench and the simulation performance of a synthesizable testbench, while greatly reducing the modeling overhead.The approach itself is hardware independent. To prove the usability of our approach, we verified a hard disc controller on an emulator. With this setup, we achieved a speed-up factor of 5000 versus plain simulation.
Renate Henftling, Andreas Zinn, Matthias Bauer 0003, Martin Zambaldi, Wolfgang Ecker
 DAC2
2003 Platform-Based Testbench Generation
Renate Henftling, Andreas Zinn, Matthias Bauer 0003, Wolfgang Ecker, Martin Zambaldi
 DATE2