Demo Data from VLDB 2026 / reviewers in the wild / expert
Milton H. Sawasaki
dblp:09/4930
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1997
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 75% Integrated circuit design · 25% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
asynchronous circuit design |
0.0 | 2 | 1997 | Externally hazard-free implementations of asynchronous control circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1997 Externally Hazard-Free Implementations of Asynchronous Circuits · DAC 1995 |
Electronic design automation › logic synthesis › combinational logic synthesis
combinational logic optimization |
0.0 | 2 | 1997 | Externally hazard-free implementations of asynchronous control circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1997 Externally Hazard-Free Implementations of Asynchronous Circuits · DAC 1995 |
Electronic design automation › logic synthesis › asynchronous circuit synthesis
hazard-free implementation |
0.0 | 2 | 1997 | Externally hazard-free implementations of asynchronous control circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1997 Externally Hazard-Free Implementations of Asynchronous Circuits · DAC 1995 |
Electronic design automation
logic synthesis |
0.0 | 2 | 1997 | Externally hazard-free implementations of asynchronous control circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1997 Externally Hazard-Free Implementations of Asynchronous Circuits · DAC 1995 |
Methods — techniques the papers use, named apart from their topics
sum-of-products implementation · 0.0state graph optimization · 0.0semi-modular state graphs · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1997 | Externally hazard-free implementations of asynchronous control circuitsabstractWe present a new sum-of-product-based asynchronous architecture, called the N-SHOT architecture, that operates correctly under internal hazardous responses and guarantees hazard-freeness at the observable noninput signals. We formally prove that within this architecture, a very wide class of semimodular state graphs with input choices (either distributive or nondistributive) that satisfy the complete state coding property always admit a correct implementation, As with synchronous circuits, we permit internal hazards in the combinational logic core, which means that we can make use of conventional combinational logic minimization methods to produce the sum-of-product implementation. This represents a significant departure from most existing methods that require the combinational logic to be hazard-free and are mainly valid for distributive behaviors, We also present optimizations for this architecture which are related to state graph properties. Milton H. Sawasaki, Chantal Ykman-Couvreur, Bill Lin 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1995 | Externally Hazard-Free Implementations of Asynchronous CircuitsabstractWe present a new sum-of-product based asynchronous architecture, called the N-SHOT architecture, that operates correctly under internal hazardous responses and guarantees hazard-freeness at the observable non-input signals.We formally prove that within this architecture a very wide class of semi-modular state graphs with input choices (either distributive or non-distributive) that satisfy the complete state coding property always admit a correct implementation.As with synchronous circuits, we permit internal hazards in the combinational logic core, which means we can make use of conventional combinational logic minimization methods to produce the sum-of-product implementation.This represents a significant departure from most existing methods that require the combinational logic to be hazard-free and are mainly valid for distributive behaviors. Milton H. Sawasaki, Chantal Ykman-Couvreur, Bill Lin 0001 |
DAC | 1 |