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Stefano Manzini

dblp:09/935 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1988
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
device modeling		 0.011988
A physically based mobility model for numerical simulation of nonplanar devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Integrated circuit design › semiconductor devices › field-effect transistor
MOSFET		 0.011988
A physically based mobility model for numerical simulation of nonplanar devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

parameter extraction · 0.0mattiessen's rule · 0.0
YearPublicationVenuePosition
1988 A physically based mobility model for numerical simulation of nonplanar devices
abstract
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points.>
Claudio Lombardi, Stefano Manzini, Antonio Saporito, Massimo Vanzi
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2