VLDB 2026 Research / reviewers in the wild / expert
Gerhard Schellhorn
dblp:10/2029
· DBLP profile ↗
60ranked-venue papers
16as first author
11since 2021 · last 2025
0000-0001-6712-7178ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 36 · 10 first-author · 6 since 2021Theory of computation · 35 · 8 first-author · 8 since 2021Artificial intelligence and machine learning · 4 · 2 first-authorSecurity and privacy · 3 · 2 first-authorComputer networks · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Model Checking Buffered Durable Linearizability in CSP
Chelsea Edmonds, John Derrick, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
iFM | 4 |
| 2025 | Verification of forward simulations with thread-local, step-local proof obligationsabstractThis paper presents a proof technique for proving refinements for general state-based models of concurrent systems that reduces proving forward simulations to thread-local, step-local proof obligations. The approach has been implemented in our theorem prover KIV, which translates imperative programs to a set of transition rules and generates proof obligations accordingly. Instances of this proof technique should also be applicable to systems specified with ASM rules, B events, or Z operations. To exemplify the proof methodology, we demonstrate it with two case studies. The first verifies linearizability of a lock-free implementation of concurrent hash sets by showing that it refines an abstract concurrent system with atomic operations. The second applies the proof technique to the verification of opacity of Transactional Mutex Locks (TML), a Software Transactional Memory algorithm. Compared to the standard approach of proving a forward simulation directly, both case studies show a significant reduction in proof effort. Gerhard Schellhorn, Stefan Bodenmüller, Wolfgang Reif |
Sci. Comput. Program. | 1 |
| 2024 | VeriCode: Correct Translation of Abstract Specifications to C Code
Gerhard Schellhorn, Stefan Bodenmüller, Wolfgang Reif |
IFM | 1 |
| 2024 | A Fully Verified Persistency Library
Stefan Bodenmüller, John Derrick, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
VMCAI (2) | 4 |
| 2023 | Refinement and Separation: Modular Verification of Wandering Trees
Gerhard Schellhorn, Stefan Bodenmüller, Wolfgang Reif |
iFM | 1 |
| 2023 | Thread-Local, Step-Local Proof Obligations for Refinement of State-Based Concurrent Systems
Gerhard Schellhorn, Stefan Bodenmüller, Wolfgang Reif |
ABZ | 1 |
| 2022 | Weak Progressive Forward Simulation Is Necessary and Sufficient for Strong Observational RefinementabstractHyperproperties are correctness conditions for labelled transition systems that are more expressive than traditional trace properties, with particular relevance to security. Recently, Attiya and Enea studied a notion of strong observational refinement that preserves all hyperproperties. They analyse the correspondence between forward simulation and strong observational refinement in a setting with finite traces only. We study this correspondence in a setting with both finite and infinite traces. In particular, we show that forward simulation does not preserve hyperliveness properties in this setting. We extend the forward simulation proof obligation with a progress condition, and prove that this progressive forward simulation does imply strong observational refinement. Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
CONCUR | 2 |
| 2022 | Verification of Crashsafe Caching in a Virtual File System SwitchabstractWhen developing file systems, caching is a common technique to achieve a performant implementation. Integrating write-back caches is not primarily a problem for functional correctness, but is critical for proving crash safety. Since parts of written data are stored in volatile memory, special care has to be taken when integrating write-back caches to guarantee that a power cut during a running operation leads to a consistent state. This article shows how non-order-preserving caches can be added to a virtual file system switch (VFS) and gives a novel crash-safety criterion matching the characteristics of such caches. Broken down to individual files, a power cut can be explained by constructing an alternative run, where all writes since the last synchronization of that file have written a prefix. VFS caches have been integrated modularly into Flashix, a verified file system for flash memory, and both functional correctness and crash-safety of this extension have been verified with the interactive theorem prover KIV. Stefan Bodenmüller, Gerhard Schellhorn, Wolfgang Reif |
Formal Aspects Comput. | 2 |
| 2022 | Modularising Verification Of Durable OpacityabstractNon-volatile memory (NVM), also known as persistent memory, is an emerging paradigm for memory that preserves its contents even after power loss. NVM is widely expected to become ubiquitous, and hardware architectures are already providing support for NVM programming. This has stimulated interest in the design of novel concepts ensuring correctness of concurrent programming abstractions in the face of persistency and in the development of associated verification approaches. Software transactional memory (STM) is a key programming abstraction that supports concurrent access to shared state. In a fashion similar to linearizability as the correctness condition for concurrent data structures, there is an established notion of correctness for STMs known as opacity. We have recently proposed durable opacity as the natural extension of opacity to a setting with non-volatile memory. Together with this novel correctness condition, we designed a verification technique based on refinement. In this paper, we extend this work in two directions. First, we develop a durably opaque version of NOrec (no ownership records), an existing STM algorithm proven to be opaque. Second, we modularise our existing verification approach by separating the proof of durability of memory accesses from the proof of opacity. For NOrec, this allows us to re-use an existing opacity proof and complement it with a proof of the durability of accesses to shared state. Eleni Bila, John Derrick, Simon Doherty, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
Log. Methods Comput. Sci. | 5 |
| 2021 | Brief Announcement: On Strong Observational Refinement and Forward Simulation
John Derrick, Simon Doherty, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
DISC | 4 |
| 2021 | Verifying correctness of persistent concurrent data structures: a sound and complete methodabstractAbstract Non-volatile memory (NVM), aka persistent memory, is a new memory paradigm that preserves its contents even after power loss. The expected ubiquity of NVM has stimulated interest in the design of persistent concurrent data structures, together with associated notions of correctness. In this paper, we present a formal proof technique for durable linearizability , which is a correctness criterion that extends linearizability to handle crashes and recovery in the context ofNVM.Our proofs are based on refinement of Input/Output automata (IOA) representations of concurrent data structures. To this end, we develop a generic procedure for transforming any standard sequential data structure into a durable specification and prove that this transformation is both sound and complete. Since the durable specification only exhibits durably linearizable behaviours, it serves as the abstract specification in our refinement proof. We exemplify our technique on a recently proposed persistentmemory queue that builds on Michael and Scott’s lock-free queue. To support the proofs, we describe an automated translation procedure from code to IOA and a thread-local proof technique for verifying correctness of invariants. John Derrick, Simon Doherty, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
Formal Aspects Comput. | 4 |
| 2020 | Defining and Verifying Durable Opacity: Correctness for Persistent Software Transactional Memory
Eleni Bila, Simon Doherty, Brijesh Dongol, John Derrick, Gerhard Schellhorn, Heike Wehrheim |
FORTE | 5 |
| 2020 | Modular Integration of Crashsafe Caching into a Verified Virtual File System Switch
Stefan Bodenmüller, Gerhard Schellhorn, Wolfgang Reif |
IFM | 2 |
| 2019 | Verifying Correctness of Persistent Concurrent Data Structures
John Derrick, Simon Doherty, Brijesh Dongol, Gerhard Schellhorn, Heike Wehrheim |
FM | 4 |
| 2018 | FastLane Is Opaque - a Case Study in Mechanized Proofs of Opacity
Gerhard Schellhorn, Monika Wedel, Oleg Travkin 0001, Jürgen König, Heike Wehrheim |
SEFM | 1 |
| 2018 | Mechanized proofs of opacity: a comparison of two techniquesabstractAbstract Software transactional memory (STM) provides programmers with a high-level programming abstraction for synchronization of parallel processes, allowing blocks of codes that execute in an interleaved manner to be treated as atomic blocks. This atomicity property is captured by a correctness criterion called opacity , which relates the behaviour of an STM implementation to those of a sequential atomic specification. In this paper, we prove opacity of a recently proposed STM implementation: the Transactional Mutex Lock (TML) by Dalessandro et al. For this, we employ two different methods: the first method directly shows all histories of TML to be opaque (proof by induction), using a linearizability proof of TML as an assistance; the second method shows TML to be a refinement of an existing intermediate specification called TMS2 which is known to be opaque (proof by simulation). Both proofs are carried out within interactive provers, the first with KIV and the second with both Isabelle and KIV. This allows to compare not only the proof techniques in principle, but also their complexity in mechanization. It turns out that the second method, already leveraging an existing proof of opacity of TMS2, allows the proof to be decomposed into two independent proofs in the way that the linearizability proof does not. John Derrick, Simon Doherty, Brijesh Dongol, Gerhard Schellhorn, Oleg Travkin 0001, Heike Wehrheim |
Formal Aspects Comput. | 4 |
| 2018 | Symbolic execution for a clash-free subset of ASMs
Gerhard Schellhorn, Gidon Ernst, Jörg Pfähler, Stefan Bodenmüller, Wolfgang Reif |
Sci. Comput. Program. | 1 |
| 2017 | Modular Verification of Order-Preserving Write-Back Caches
Jörg Pfähler, Gidon Ernst, Stefan Bodenmüller, Gerhard Schellhorn, Wolfgang Reif |
IFM | 4 |
| 2016 | Towards a Thread-Local Proof Technique for Starvation Freedom
Gerhard Schellhorn, Oleg Travkin 0001, Heike Wehrheim |
IFM | 1 |
| 2016 | Proving Opacity of a Pessimistic STMabstractTransactional Memory (TM) is a high-level programming abstraction for concurrency control that provides programmers with the illusion of atomically executing blocks of code, called transactions. TMs come in two categories, optimistic and pessimistic, where in the latter transactions never abort. While this simplifies the programming model, high-performing pessimistic TMs can be complex. In this paper, we present the first formal verification of a pessimistic software TM algorithm, namely, an algorithm proposed by Matveev and Shavit. The correctness criterion used is opacity, formalising the transactional atomicity guarantees. We prove that this pessimistic TM is a refinement of an intermediate opaque I/O-automaton, known as TMS2. To this end, we develop a rely-guarantee approach for reducing the complexity of the proof. Proofs are mechanised in the interactive prover Isabelle. Simon Doherty, Brijesh Dongol, John Derrick, Gerhard Schellhorn, Heike Wehrheim |
OPODIS | 4 |
| 2016 | Modular, crash-safe refinement for ASMs with submachines
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Wolfgang Reif |
Sci. Comput. Program. | 3 |
| 2015 | Verifying Opacity of a Transactional Mutex Lock
John Derrick, Brijesh Dongol, Gerhard Schellhorn, Oleg Travkin 0001, Heike Wehrheim |
FM | 3 |
| 2015 | Verification of B+ trees by integration of shape analysis and interactive theorem proving
Gidon Ernst, Gerhard Schellhorn, Wolfgang Reif |
Softw. Syst. Model. | 2 |
| 2015 | KIV: overview and VerifyThis competition
Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Dominik Haneberg, Wolfgang Reif |
Int. J. Softw. Tools Technol. Transf. | 3 |
| 2014 | Quiescent Consistency: Defining and Verifying Relaxed Linearizability
John Derrick, Brijesh Dongol, Gerhard Schellhorn, Bogdan Tofan, Oleg Travkin 0001, Heike Wehrheim |
FM | 3 |
| 2014 | A Compositional Proof Method for Linearizability Applied to a Wait-Free Multiset
Bogdan Tofan, Gerhard Schellhorn, Wolfgang Reif |
IFM | 2 |
| 2014 | Two approaches for proving linearizability of multiset
Bogdan Tofan, Oleg Travkin 0001, Gerhard Schellhorn, Heike Wehrheim |
Sci. Comput. Program. | 3 |
| 2014 | A Sound and Complete Proof Technique for Linearizability of Concurrent Data StructuresabstractEfficient implementations of data structures such as queues, stacks or hash-tables allow for concurrent access by many processes at the same time. To increase concurrency, these algorithms often completely dispose with locking, or only lock small parts of the structure. Linearizability is the standard correctness criterion for such a scenario—where a concurrent object is linearizable if all of its operations appear to take effect instantaneously some time between their invocation and return. The potential concurrent access to the shared data structure tremendously increases the complexity of the verification problem, and thus current proof techniques for showing linearizability are all tailored to specific types of data structures. In previous work, we have shown how simulation-based proof conditions for linearizability can be used to verify a number of subtle concurrent algorithms. In this article, we now show that conditions based on backward simulation can be used to show linearizability of every linearizable algorithm, that is, we show that our proof technique is both sound and complete. We exemplify our approach by a linearizability proof of a concurrent queue, introduced in Herlihy and Wing's landmark paper on linearizability. Except for their manual proof, none of the numerous other approaches have successfully treated this queue. Our approach is supported by a full mechanisation: both the linearizability proofs for case studies like the queue, and the proofs of soundness and completeness have been carried out with an interactive prover, which is KIV. Gerhard Schellhorn, John Derrick, Heike Wehrheim |
ACM Trans. Comput. Log. | 1 |
| 2012 | How to Prove Algorithms Linearisable
Gerhard Schellhorn, Heike Wehrheim, John Derrick |
CAV | 1 |
| 2011 | Verifying Linearisability with Potential Linearisation Points
John Derrick, Gerhard Schellhorn, Heike Wehrheim |
FM | 2 |
| 2011 | Formal Verification of a Lock-Free Stack with Hazard Pointers
Bogdan Tofan, Gerhard Schellhorn, Wolfgang Reif |
ICTAC | 2 |
| 2011 | Verification of B + Trees: An Experiment Combining Shape Analysis and Interactive Theorem Proving
Gidon Ernst, Gerhard Schellhorn, Wolfgang Reif |
SEFM | 2 |
| 2011 | Extending ITL with Interleaved Programs for Interactive VerificationabstractThe talk presents extensions of ITL that make it a powerful logic to reason about interleaved programs with recursive procedures. The extensions have been implemented in the interactive theorem prover KIV. Gerhard Schellhorn |
TIME | 1 |
| 2011 | Interleaved Programs and Rely-Guarantee Reasoning with ITLabstractThis paper presents a logic that extends basic ITL with explicit, interleaved programs. The calculus is based on symbolic execution, as previously described. We extend this former work here, by integrating the logic with higher-order logic, adding recursive procedures and rules to reason about fairness. Further, we show how rules for rely-guarantee reasoning can be derived and outline the application of some features to verify concurrent programs in practice. The logic is implemented in the interactive verification environment KIV. Gerhard Schellhorn, Bogdan Tofan, Gidon Ernst, Wolfgang Reif |
TIME | 1 |
| 2011 | Proving linearizability with temporal logicabstractAbstract Linearizability is a global correctness criterion for concurrent systems. One technique to prove linearizability is applying a composition theorem which reduces the proof of a property of the overall system to sufficient rely-guarantee conditions for single processes. In this paper, we describe how the temporal logic framework implemented in the KIV interactive theorem prover can be used to model concurrent systems and to prove such a composition theorem. Finally, we show how this generic theorem can be instantiated to prove linearizability of two classic lock-free implementations: a Treiber-like stack and a slightly improved version of Michael and Scott’s queue. Simon Bäumler, Gerhard Schellhorn, Bogdan Tofan, Wolfgang Reif |
Formal Aspects Comput. | 2 |
| 2011 | Selected papers of the Refinement Workshop Turku (2008)
Eerke A. Boiten, John Derrick, Gerhard Schellhorn |
Sci. Comput. Program. | 3 |
| 2011 | Completeness of fair ASM refinement
Gerhard Schellhorn |
Sci. Comput. Program. | 1 |
| 2011 | Mechanically verified proof obligations for linearizabilityabstractConcurrent objects are inherently complex to verify. In the late 80s and early 90s, Herlihy and Wing proposed linearizability as a correctness condition for concurrent objects, which, once proven, allows us to reason about concurrent objects using pre- and postconditions only. A concurrent object is linearizable if all of its operations appear to take effect instantaneously some time between their invocation and return. In this article we define simulation-based proof conditions for linearizability and apply them to two concurrent implementations, a lock-free stack and a set with lock-coupling. Similar to other approaches, we employ a theorem prover (here, KIV) to mechanize our proofs. Contrary to other approaches, we also use the prover to mechanically check that our proof obligations actually guarantee linearizability. This check employs the original ideas of Herlihy and Wing of verifying linearizability via possibilities . John Derrick, Gerhard Schellhorn, Heike Wehrheim |
ACM Trans. Program. Lang. Syst. | 2 |
| 2010 | Temporal Logic Verification of Lock-Freedom
Bogdan Tofan, Simon Bäumler, Gerhard Schellhorn, Wolfgang Reif |
MPC | 3 |
| 2010 | Atomic actions, and their refinements to isolated protocolsabstractAbstract Inspired by the properties of the refinement development of the Mondex Electronic Purse, we view an isolated atomic action as a family of transitions with a common before-state, and different after-states corresponding to different possible outcomes when the action is attempted. We view a protocol for an atomic action as a computation DAG, each path of which achieves in several steps one of the outcomes of the atomic action. We show that in this picture, the protocol can be viewed as a relational refinement of the atomic action in a number of ways. Firstly, it yields a ‘big diagram’ simulation à la ASM. Secondly, it yields a ‘small diagram’ simulation, in which the atomic action is synchronised with an individual step along each path through the protocol, and all the other steps of the path simulate skip. We show that provided each path through the protocol contains one step synchronised with the atomic action, the choice of synchronisation point can be made freely. We describe the relationship between such synchronisations and forward and backward simulations. We relate this theory to serialisations of system runs containing multiple interleaved transactions, showing how the clean picture of the refinement of an isolated atomic action to an isolated protocol becomes obscured by the details of the interleaving. In effect, the fact that protocols are typically executed by a number of co-operating agents, not all of which embark on executing the protocol at the same moment, results in ‘ragged starts’ and ‘ragged ends’ to protocol instantiations, leading to potential overlaps between unrelated protocol instances that the theory must handle. We show how existing Mondex refinements embody the ideas developed, and describe a mechanical verification of the results presented. Richard Banach, Gerhard Schellhorn |
Formal Aspects Comput. | 2 |
| 2010 | Automated Flaw Detection in Algebraic Specifications
Andriy Dunets, Gerhard Schellhorn, Wolfgang Reif |
J. Autom. Reason. | 2 |
| 2009 | Abstract Specification of the UBIFS File System for Flash Memory
Andreas Schierl, Gerhard Schellhorn, Dominik Haneberg, Wolfgang Reif |
FM | 2 |
| 2009 | Relational concurrent refinement part II: Internal operations and outputsabstractAbstract Two styles of description arise naturally in formal specification: state-based and behavioural. In state-based notations, a system is characterised by a collection of variables, and their values determine which actions may occur throughout a system history. Behavioural specifications describe the chronologies of actions—interactions between a system and its environment. The exact nature of such interactions is captured in a variety of semantic models with corresponding notions of refinement; refinement in state based systems is based on the semantics of sequential programs and is modelled relationally. Acknowledging that these viewpoints are complementary, substantial research has gone into combining the paradigms. The purpose of this paper is to do three things. First, we survey recent results linking the relational model of refinement to the process algebraic models. Specifically, we detail how variations in the relational framework lead to relational data refinement being in correspondence with traces–divergences, singleton failures and failures–divergences refinement in a process semantics. Second, we generalise these results by providing a general flexible scheme for incorporating the two main “erroneous” concurrent behaviours: deadlock and divergence, into relational refinement. This is shown to subsume previous characterisations. In doing this we derive relational refinement rules for specifications containing both internal operations and outputs that corresponds to failures–divergences refinement. Third, the theory has been formally specified and verified using the interactive theorem prover KIV. Eerke A. Boiten, John Derrick, Gerhard Schellhorn |
Formal Aspects Comput. | 3 |
| 2008 | Automating Algebraic Specifications of Non-freely Generated Data Types
Andriy Dunets, Gerhard Schellhorn, Wolfgang Reif |
ATVA | 2 |
| 2008 | Verification of Mondex Electronic Purses with KIV: From a Security Protocol to Verified Code
Holger Grandy, Markus Bischof, Kurt Stenzel, Gerhard Schellhorn, Wolfgang Reif |
FM | 4 |
| 2008 | Bounded Relational Analysis of Free Data Types
Andriy Dunets, Gerhard Schellhorn, Wolfgang Reif |
TAP | 2 |
| 2008 | Verification of Mondex electronic purses with KIV: from transactions to a security protocolabstractAbstract The Mondex case study about the specification and refinement of an electronic purse as defined in the Oxford Technical Monograph PRG-126 has recently been proposed as a challenge for formal system-supported verification. In this paper we report on two results. First, on the successful verification of the full case study using the KIV specification and verification system. We demonstrate that even though the hand-made proofs were elaborated to an enormous level of detail we still could find small errors in the underlying data refinement theory, as well as the formal proofs of the case study. Second, the original Mondex case study verifies functional correctness assuming a suitable security protocol. We extend the case study here with a refinement to a suitable security protocol that uses symmetric cryptography to achieve the necessary properties of the security-relevant messages. The definition is based on a generic framework for defining such protocols based on abstract state machines (ASMs). We prove the refinement using a forward simulation. Dominik Haneberg, Gerhard Schellhorn, Holger Grandy, Wolfgang Reif |
Formal Aspects Comput. | 2 |
| 2007 | A Modeling Framework for the Development of Provably Secure E-Commerce ApplicationsabstractDeveloping security-critical applications is very difficult and the past has shown that many applications turned out to be erroneous after years of usage. For this reason it is desirable to have a sound methodology for developing security-critical e-commerce applications. We present an approach to model these applications with the Unified Modeling Language (UML) [1] extended by a UML profile to tailor our models to security applications. Our intent is to (semi-) automatically generate a formal specification suitable for verification as well as an implementation from the model. Therefore we offer a development method seamlessly integrating semi-formal and formal methods as well as the implementation. This is a significant advantage compared to other approaches not dealing with all aspects from abstract models down to code. Based on this approach we can prove security properties on the abstract protocol level as well as the correctness of the protocol implementation in Java with respect to the formal model using the refinement approach. In this paper we concentrate on the modeling with UML and some details regarding the transformation of this model into the formal specification. We illustrate our approach on an electronic payment system called Mondex [10]. Mondex has become famous for being the target of the first ITSEC evaluation of the highest level E6 which requires formal specification and verification. Nina Moebius, Dominik Haneberg, Wolfgang Reif, Gerhard Schellhorn |
ICSEA | 4 |
| 2007 | Proving Linearizability Via Non-atomic Refinement
John Derrick, Gerhard Schellhorn, Heike Wehrheim |
IFM | 2 |
| 2007 | Verifying Smart Card Applications: An ASM Approach
Dominik Haneberg, Holger Grandy, Wolfgang Reif, Gerhard Schellhorn |
IFM | 4 |
| 2006 | The Mondex Challenge: Machine Checked Proofs for an Electronic Purse
Gerhard Schellhorn, Holger Grandy, Dominik Haneberg, Wolfgang Reif |
FM | 1 |
| 2005 | ASM refinement and generalizations of forward simulation in data refinement: a comparison
Gerhard Schellhorn |
Theor. Comput. Sci. | 1 |
| 2002 | Safety Analysis of the Height Control System for the Elbtunnel
Frank Ortmeier, Gerhard Schellhorn, Andreas Thums, Wolfgang Reif, Bernhard Hering, Helmut Trappschuh |
SAFECOMP | 2 |
| 2002 | Verified Formal Security Models for Multiapplicative Smart CardsabstractWe present two generic formal security models for operating systems of multiapplicative smart cards. The models formalize the main security aspects of secrecy, integrity, secure communication between applications and secure downloading of new applica Gerhard Schellhorn, Wolfgang Reif, Axel Schairer, Paul A. Karger, Vernon Austel, David C. Toll |
J. Comput. Secur. | 1 |
| 2002 | Verifying Concurrent Systems with Symbolic ExecutionabstractCurrent techniques for interactively proving temporal properties of concurrent systems translate transition systems into temporal formulas by introducing program counter variables. Proofs are not intuitive, because control flow is not explicitly considered. For sequential programs symbolic execution is a very intuitive, interactive proof strategy. In this paper we will adopt this technique for parallel programs. Properties are formulated in interval temporal logic. An inplementation in the interactive theorem prover KIV has shown that this technique offers a high degree of automation and allows simple, local invariants. Michael Balser, Christoph Duelli, Wolfgang Reif, Gerhard Schellhorn |
J. Log. Comput. | 4 |
| 2000 | Verification of a Formal Security Model for Multiapplicative Smart Cards
Gerhard Schellhorn, Wolfgang Reif, Axel Schairer, Paul A. Karger, Vernon Austel, David C. Toll |
ESORICS | 1 |
| 2000 | Formal System Development with KIV
Michael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel, Andreas Thums |
FASE | 3 |
| 2000 | Do You Trust Your Model Checker?
Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer |
FMCAD | 3 |
| 1997 | Proving System Correctness with KIV 3.0
Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel |
CADE | 2 |
| 1993 | The KIV System: A Tool for Formal Program Development
Rainer Drexler, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel, Werner Stephan 0001, Andreas Wolpers |
STACS | 3 |