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Andreia Melo

dblp:10/3253 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › embedded software
embedded applications		 0.011999
FPGA-Targeted Development System for Embedded Applications · FPGA 1999
Embedded and real-time systems › embedded hardware platform
FPGA-based embedded platform		 0.011999
FPGA-Targeted Development System for Embedded Applications · FPGA 1999
YearPublicationVenuePosition
1999 Development System for FPGA-Based Digital Circuits
abstract
The paper discusses some new hardware and software tools that can be used for the design of virtual circuits based on dynamically reconfigurable FPGAs. With the aid of these tools we can implement a system that requires some, hardware resources R/sub c/, on available hardware that has resources R/sub h/, where R/sub c/>R/sub h/. The main idea of the approach supported by these tools is the rational combination of FPGA capabilities with some proposed methods for producing a modifiable specification, together with a novel technique for architectural and logic synthesis, which has been incorporated into the new design environment.
Valery Sklyarov, José A. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Iouliia Skliarova, Paulo Alexandre Correia da Silva Neves, António de Brito Ferrari
 FCCM5
1999 FPGA-Targeted Development System for Embedded Applications
abstract
No abstract available.
Valery Sklyarov, José A. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Konstantin Kondratjuk, Iouliia Skliarova, Paulo Alexandre Correia da Silva Neves, António de Brito Ferrari
 FPGA5