VLDB 2026 Research / reviewers in the wild / expert
Yuqiang Huang
dblp:10/3403
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Program analysis · 56% Compilers and program optimization · 28% Software testing · 17% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Program analysis
data flow analysis |
0.1 | 1 | 2010 | Detecting bugs in register allocation · ACM Trans. Program. Lang. Syst. 2010 |
Compilers and program optimization
register allocation |
0.1 | 1 | 2010 | Detecting bugs in register allocation · ACM Trans. Program. Lang. Syst. 2010 |
Program analysis › data flow analysis
value-flow analysis |
0.1 | 1 | 2010 | Detecting bugs in register allocation · ACM Trans. Program. Lang. Syst. 2010 |
Software testing
compiler testing |
0.0 | 1 | 2010 | Detecting bugs in register allocation · ACM Trans. Program. Lang. Syst. 2010 |
Software testing
regression testing |
0.0 | 1 | 2010 | Detecting bugs in register allocation · ACM Trans. Program. Lang. Syst. 2010 |
Methods — techniques the papers use, named apart from their topics
static checking · 0.1data flow analysis · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Detecting bugs in register allocationabstractAlthough register allocation is critical for performance, the implementation of register allocation algorithms is difficult, due to the complexity of the algorithms and target machine architectures. It is particularly difficult to detect register allocation errors if the output code runs to completion, as bugs in the register allocator can cause the compiler to produce incorrect output code. The output code may even execute properly on some test data, but errors can remain. In this article, we propose novel data flow analyses to statically check that the value flow of the output code from the register allocator is the same as the value flow of its input code. The approach is accurate, fast, and can identify and report error locations and types. It is independent of the register allocator and uses only the input and output code of the register allocator. It can be used with different register allocators, including those that perform coalescing and rematerialization. The article describes our approach, called SARAC, and a tool that statically checks a register allocation and reports the errors and their types that it finds. The tool has an average compile-time overhead of only 8% and a modest average memory overhead of 85KB. Our techniques can be used by compiler developers during regression testing and as a command-line-enabled debugging pass for mysterious compiler behavior. Yuqiang Huang, Bruce R. Childers, Mary Lou Soffa |
ACM Trans. Program. Lang. Syst. | 1 |
| 2006 | Catching and Identifying Bugs in Register Allocation
Yuqiang Huang, Bruce R. Childers, Mary Lou Soffa |
SAS | 1 |