Demo Data from VLDB 2026 / reviewers in the wild / expert
Márta Rencz
dblp:10/3998
· DBLP profile ↗
12ranked-venue papers
2as first author
0since 2021 · last 2018
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 11 · 2 first-authorSoftware engineering, systems software and programming languages · 2 · 1 first-authorHuman-computer interaction and ubiquitous computing · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 77% Integrated circuit design · 23% |
Topics — the 1 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › microelectromechanical systems
micromachining |
0.0 | 1 | 1997 | CAD and Foundries for Microsystems · DAC 1997 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | Joint international master in smart systems integration: University collaboration for improved educationabstractThe Joint International Master in Smart Systems Integration (SSI) graduates candidates for the ever-growing industry of Smart Systems, ubiquitous in all sectors of society including healthcare, transport, environment protection, energy and security. SSI is given jointly by three universities in three European countries: Heriot-Watt University (HWU) (Edinburgh, Scotland), University College of Southeast Norway (HSN), and Budapest University of Technology and Economics (BME) (Hungary), utilizing the complementary expertise and laboratory facilities of the three partners to create a unique programme with a more holistic approach than a single university could give. The programme is run in close collaboration with industry, to assure its relevance. SSI has Erasmus Mundus status, and the graduates receive a Joint Degree. SSI students benefit from the extended competence the consortium can provide, as well as from the extended socio-cultural knowledge obtained by living in three different European countries that represent distinctively different aspects of the diverse Europe. The students in the programme show excellent performance, and the employability of graduates has proven to be very high. The partner universities benefit from the high performance of the students, and from the intimate interaction with the partners allowing exchange of best practice in education, teaching and evaluation. Knut E. Aasmundtveit, Changhai Wang, Márta Rencz, Marc P. Y. Desmulliez, Ferenc Ender, Kristin Imenes |
EDUCON | 3 |
| 2003 | A Fast Algorithm for the Layout Based Electro-Thermal Simulation
Márta Rencz, Vladimír Székely, András Poppe |
DATE | 1 |
| 2000 | Towards design and validation of mixed-technology SOCsabstractThis paper illustrates an approach to design and validation of heterogeneous systems. The emphasis is placed on devices which incorporate MEMS parts in either a single mixed-technology (CMOS + micromachining) SOC device, or alternatively as a hybrid system with the MEMS part in a separate chip. The design flow is general, and it is illustrated for the case of applications embedding CMOS sensors. In particular, applications based on finger-print recognition are considered since a rich variety of sensors and data processing algorithms can be considered. A high level multi-language/multi-engine approach is used for system specification and co-simulation. This also allows for an initial high-level architecture exploration, according to performance and cost requirements imposed by the target application. Thermal simulation of the overall device, including packaging, is also considered since this can have a significant impact in sensor performance. From the selected system specification, the actual architecture is finally generated via a multi-language co-design approach which can result in both hardware and software parts. The hardware parts are composed of available IP cores. For the case of a single chip implementation, the most important issue of embedded-core-based testing is briefly considered, and current techniques are adapted for testing the embedded cores in the SOC devices discussed. Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz |
ACM Great Lakes Symposium on VLSI | 9 |
| 2000 | IDDQ Testing of Submicron CMOS - by Cooling?
Márta Rencz, Vladimír Székely, S. Török, Kholdoun Torki, Bernard Courtois |
J. Electron. Test. | 1 |
| 1998 | Fast Field Solvers for Thermal and Electrostatic AnalysisabstractTwo different field solver tools have been developed in order to facilitate fast thermal and electro-static simulation of microsystem elements. The /spl mu/S-THERMANAL program is capable of the fast steady-state and dynamic simulation of suspended multilayered microsystem structures. The 2D-SUNRED program is the first version of a general field solver based an an original method, the successive node reduction. SUNRED offers a very fast and accurate substitute of FEM programs for the solution of the Poisson equation. Steady-state and dynamic simulation examples demonstrate the usability of the novel tool. Vladimír Székely, Márta Rencz |
DATE | 2 |
| 1998 | Thermal Monitoring of Self-Checking Systems
Vladimír Székely, Márta Rencz, Jean-Michel Karam, Marcelo Lubaszewski, Bernard Courtois |
J. Electron. Test. | 2 |
| 1997 | CAD and Foundries for MicrosystemsabstractBesides foundry facilities, Computer-Aided Design (CAD) tools are also required to move microsystems from research prototypes to an industrial market. Currently available CAD tools need extensions before they can be used for the automated design of micromachined devices. This paper presents a low cost access to microsystem technology (MST), applied by the CMP service, and based on the use of existing microelectronics production lines, with additional post-processing for microsystem specific 2D and 3D structures, and a global CAD approach for the design and simulation of microsystems applied to currently available commercial CAD tools, e.g. Mentor Framework, in order t o ensure a continuous flow from the design to the manufacturing. Jean-Michel Karam, Bernard Courtois, Hicham Boutamine, Paul Drake, András Poppe, Vladimír Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner |
DAC | 7 |
| 1997 | Fast field solver-programs for thermal and electrostatic analysis of microsystem elementsabstractTo solve the problem of fast thermal and electrostatic simulation of microsystem elements two different field solver tools have been developed at TUB. The /spl mu/S-THERMANAL program is capable for the fast steady state and dynamic simulation of suspended multilayered microsystem structures, while the 2D-SUNRED program is the first version of a general field solver program, based on an original method, successive network reduction. This program offers a very fast and accurate substitute for FEM programs for the solution of the Poisson equation, e.g. solving a 32000 grid problem in about 6 minutes on a 586 PC. Application examples show the usability of the tools. Vladimír Székely, Márta Rencz |
ICCAD | 2 |
| 1997 | Integrating on-chip temperature sensors into DfT schemes and BIST architecturesabstractThe continuously increasing power densities in integrated circuits necessitated the introduction of DfTT (Design for Thermal Testability) design methodology to prevent overheating effects. Newly developed CMOS temperature sensors enable the application of DfTT principle in safety-critical circuits. Parameters and operation principles of the low-power small-area temperature sensor family are presented in details in the paper, followed by the discussion of placement and testing strategies. Vladimír Székely, Márta Rencz, Bernard Courtois |
VTS | 2 |
| 1997 | CMOS sensors for on-line thermal monitoring of VLSI circuitsabstractThe paper presents appropriate sensors for the realization of the design principle of design for thermal testability (DfTT). After a short overview of the available CMOS temperature sensors, a new family of temperature sensors will be presented, developed by the authors especially for the purpose of thermal monitoring of VLSI chips. These sensors are characterized by the very low silicon area of about 0.003-0.02 mm/sup 2/ and the low power consumption (200 /spl mu/W). The accuracy is in the order of 1/spl deg/C. Using the frequency-output versions an easy interfacing of digital test circuitry is assured. They can be very easily incorporated into the usual test circuitry, via the boundary-scan architecture. The paper presents measured results obtained by the experimental circuits. The facilities provided by the sensor connected to the boundary-scan test circuitry are also demonstrated experimentally. Vladimír Székely, Cs. Márta, Zsolt Kohári, Márta Rencz |
IEEE Trans. Very Large Scale Integr. Syst. | 4 |
| 1997 | Electro-thermal and logi-thermal simulation of VLSI designsabstractDue to severe thermal problems of today's VLSI integrated circuits the need for reliable and quick thermal, electro-thermal and logi-thermal simulation tools is increasing, In this paper, we discuss the latest advances in the SISSI package (simulator for integrated structures by simultaneous iteration) which is a tool developed originally for analog VLSI design. The improvements include electro-thermal ac and transient simulation and the consideration of the thermal voltage of Si-Al contacts. Furthermore, we introduce a new module of SISSI, LOGITHERM, which is aimed at the self-consistent logic and thermal simulation of large digital VLSI designs. The features of our simulator package are highlighted by simulation examples that are compared in most cases with measurement results. Vladimír Székely, András Poppe, Andras Pahi, Alpar Csendes, G. Hajas, Márta Rencz |
IEEE Trans. Very Large Scale Integr. Syst. | 6 |
| 1996 | Thermal Monitoring Of Safety-Critical Integrated SystemsabstractOn-line temperature monitoring of safety-critical ICs and systems becomes more and more crucial because of downsizing of integrated circuits and of increased density due to advanced packaging. To prevent erroneous operation, temperature sensors should be placed on the critical spots, the outputs of which should be read by means of boundary scanned architectures or modified boundary scanned architectures in case of on-line monitoring. Vladimír Székely, Márta Rencz, Jean-Michel Karam, Marcelo Lubaszewski, Bernard Courtois |
Asian Test Symposium | 2 |