In a multiplayer networked game, actions for players with higher latencies are received and (potentially) acted upon later than players with lower latencies, leading to unfairness, especially important in competitive games. Time delay is a latency compensation technique that can mitigate this unfairness by adding latency to players with lower latency so that all players experience the same latency. Although this provides equal latency to all players, it unnecessarily degrades the responsiveness for the lower-latency players when the players are not interacting. We propose an adaptive time delay technique that only adds latency to low-latency players when they are interacting with players with higher latency. We conducted three separate user studies assessing player performance and experience with network latency and different compensation techniques. Analysis of the results shows adaptive time delay improves average quality of experience compared to fixed time delay while preserving time delay’s fairness.

Gamers use a variety of different display sizes, though for PC gaming, monitors in the 24 to 27 inch size range have become most popular.Particularly popular among many PC gamers, first person shooter (FPS) games represent a genre where hand-eye coordination is particularly central to the player's performance in game.In a carefully designed set of experiments on FPS aiming, we compare player performance across a range of display sizes.In two experiments, we compare 12.5 inch, 17.3 inch and 24 inch monitors on a multi-target elimination task, once with stationary, and once with moving targets.We find that aiming improves as display sizes increase.Next, we highlight the differences between 24.5 inch and 27 inch displays in a third experiment using very small targets.We find a small, but statistically significant improvement in aiming when using the larger monitor.Overall, our results indicate that in typical desktop gaming settings with freely varying head position and field of view, FPS aiming improves as display size grows, though improvements begin to decline as size approaches 30 inches.

Computer games - and computer game players - often drive technology improvements, with graphics cards and monitors pushing the limits of display technologies. High frame rates, in particular, promise to provide lower latencies and smoother game visuals to gamers, especially important for competitive first person shooter (FPS) game players. What is not well-known is to what extent gamers benefit from ultra-high frame rates in terms of player performance and quality of experience. This paper studies the effects of frame rates - especially high frame rates - on FPS game players. A custom FPS game was developed to allow for consistent delivery of frame rates from 7 f/s to 500 f/s, while recording objective (performance) and subjective (smoothness) measures. Analysis of data from a 44-person user study shows player performance (e.g., score) improves sharply from 7+ f/s, but levels out after about 90 f/s. However, users perception benefits over the full range of frame rates studied, rising sharply from 7+ f/s, but continuing to improve through the top 500 f/s.

Frametime spikes can disrupt gameplay in first-person shooter (FPS) games, affecting both performance and player experience. This paper examines how spikes during specific game events impact players. We developed a custom FPS game that maintains a steady 500 frames/s while inducing frametime spikes during weapon reloading, fast mouse movement, or targeting. Thirty-eight (38) participants played the game in a user study, providing both performance data and user-reported visual smoothness. Results show that spikes while targeting lowered accuracy and score, while spikes during reloads and mouse movement did not affect performance but still degraded user experience. These results suggest that both the relative timing and size of frametime spikes matter in FPS gameplay. Per-action models better account for average QoE when spikes happen, showing better fit than models that only consider spike size (independent of action).

User studies are a cornerstone of human-computer interaction research, including measures of user performance and quality of experience (QoE) – particularly important for games where frame rates and frame timings can impact performance. Unfortunately, commercial games have limited options for customization and do not log player performance data with sufficient detail for use in such studies. This paper introduces Lead Rush, a first-person shooter game designed for conducting user studies on the effects of frame timing and frame rate. Lead Rush is tuned to run at extremely high frame rates and includes hooks to induce frame time "spikes". Researchers can configure Lead Rush’s gameplay, trigger frame time spikes during specific actions, and log player data per game round and per study session. This paper also introduces a dataset from a user study on the effects of frame time spikes on player performance gathered from Lead Rush, and includes gameplay logs with both performance data and QoE results. Some analysis of the dataset is presented to illustrate its use.

With the advent of variable refresh rate (VRR) monitor technologies, gamers experience variable frame timing (VFT) during their gameplay. Combining VRR with low-latency GPU rendering and increased display refresh rates enables smoother variation of frame presentation sequences. Here, we assess how VFT affects self-reported perceived smoothness of game play by introducing frequent but relatively small ($\mathbf{(4 - 1 2 ~ m s}$) variations in frame time around typical refresh rates (30-240 Hz). Our results demonstrate that VFT degrades the perceived smoothness of game play for large variation in frame time (12 ms) but has a diminished effect on perceived smoothness for small variations in frame time (4 ms).

In first-person shooter (FPS) games, the peeker’s advantage is the edge the moving peeker gets when battling a stationary defender at a corner due to network latency. However, confirmation of (the size of) this advantage based on network latency and the distance from the corner has not been studied. This paper assesses the peeker’s advantage via two user studies both using an open-source FPS game extended to support two-player networking and a custom map. Users play as both peeker and defender with 3 different corner distances and 3 different network latencies. Analysis of hits, wins, and time-to-damage shows that the advantage for the peeker is impacted more by the defender’s latency than the peeker’s latency and is lowest when the peeker is nearest the corner. The user study with a tournament setting had quicker and more competitive matches resulting in more combat encounters and closer games than did the traditional user study.

Mouse sensitivity in first-person targeting tasks is a highly debated issue. Recommendations within a single game can vary by a factor of 10× or more and are an active topic of experimentation in both competitive and recreational esports communities. Inspired by work in pointer-based gain optimization and extending our previous results from the first user study focused on mouse sensitivity in first-person targeting tasks (Boudaoud et al., 2023), we describe a range of optimal mouse sensitivity wherein players perform statistically significantly better in task completion time and throughput. For tasks involving first-person view control, mouse sensitivity is best described using the ratio between an in-game rotation of the view and corresponding physical displacement of the mouse. We discuss how this displacement-to-rotation sensitivity is incompatible with the control-display gain reported in traditional pointer-based gain studies as well as other rotational gains reported in head-controlled interface studies. We provide additional details regarding impacts of mouse dots per inch, on reported sensitivity, the distribution of spatial difficulty in our experiment, our submovement parsing algorithm, and relationships between measured parameters, further demonstrating optimal sensitivity arising from a speed-precision tradeoff. We conclude our work by updating and improving our suggestions for mouse sensitivity selection and refining directions for future work.

Despite billions of hours of play and copious discussion online, mouse sensitivity recommendations for first-person targeting tasks vary by a factor of 10x or more and remain an active topic of debate in both competitive and recreational gaming communities. Inspired by previous academic literature in pointer-based gain optimization, we conduct the first user study of mouse sensitivity in first person targeting tasks, reporting a statistically significant range of optimal values in both task completion time and throughput. Due to inherent incompatibility (i.e., lack of convert-ability) between sensitivity metrics adopted for prior pointer-based gain literature and those describing first-person targeting, we provide the first analytically demonstrated, statistically significant optimal sensitivity range useful for first-person camera controls. Furthermore, we demonstrate that this optimal sensitivity range arises (at least in part) from a speed-precision trade-off impacted by spatial task difficulty, similar to results reported in pointer-based sensitivity literature previously.

Which display size helps gamers win? Recommendations from the research and PC gaming communities are contradictory. We find that as display size grows, targeting performance improves. When size increases from 13′′ to 26′′, targeting time drops by over 3%. Further size increases from 26′′ through 39′′, 52′′ and 65′′, bring more modest improvements, with targeting time dropping a further 1%. While such improvements may not be meaningful for novice gamers, they are extremely important to skilled and competitive players. To produce these results, 30 gamers participated in a targeting task as we varied display size by placing a display at varying distances. We held field of view constant by varying viewport size, and resolution constant by rendering to a fixed-size off-screen buffer. This paper offers further experimental detail, and examines likely explanations for the effects of display size.

Emergent in the field of head mounted display design is a desire to leverage the limitations of the human visual system to reduce the computation, communication, and display workload in power and form-factor constrained systems. Fundamental to this reduced workload is the ability to match display resolution to the acuity of the human visual system, along with a resulting need to follow the gaze of the eye as it moves, a process referred to as foveation. A display that moves its content along with the eye may be called a Foveated Display, though this term is also commonly used to describe displays with non-uniform resolution that attempt to mimic human visual acuity. We therefore recommend a definition for the term Foveated Display that accepts both of these interpretations. Furthermore, we include a simplified model for human visual Acuity Distribution Functions (ADFs) at various levels of visual acuity, across wide fields of view and propose comparison of this ADF with the Resolution Distribution Function of a foveated display for evaluation of its resolution at a particular gaze direction. We also provide a taxonomy to allow the field to meaningfully compare and contrast various aspects of foveated displays in a display and optical technology-agnostic manner.

We present a near-eye augmented reality display with resolution and focal depth dynamically driven by gaze tracking. The display combines a traveling microdisplay relayed off a concave half-mirror magnifier for the high-resolution foveal region, with a wide field-of-view peripheral display using a projector-based Maxwellian-view display whose nodal point is translated to follow the viewer's pupil during eye movements using a traveling holographic optical element. The same optics relay an image of the eye to an infrared camera used for gaze tracking, which in turn drives the foveal display location and peripheral nodal point. Our display supports accommodation cues by varying the focal depth of the microdisplay in the foveal region, and by rendering simulated defocus on the "always in focus" scanning laser projector used for peripheral display. The resulting family of displays significantly improves on the field-of-view, resolution, and form-factor tradeoff present in previous augmented reality designs. We show prototypes supporting 30, 40 and 60 cpd foveal resolution at a net 85° × 78° field of view per eye.

SimTRaX is a simulation infrastructure for simultaneous exploration of highly parallel accelerator architectures and how applications map to them. The infrastructure targets both cycle-accurate and functional simulation of architectures with thousands of simple cores that may share expensive computation and memory resources. A modified LLVM backend used to compile C++ programs for the simulated architecture allows the user to create custom instructions that access proposed special-purpose hardware and to debug and profile the applications being executed. The simulator models a full memory hierarchy including registers, local scratchpad RAM, shared caches, external memory channels, and DRAM main memory, leveraging the USIMM DRAM simulator to provide accurate dynamic latencies and power usage. SimTRaX provides a powerful and flexible infrastructure for exploring a class of extremely parallel architectures for parallel applications that are not easily simulated using existing simulators.

Abstract We propose two hardware mechanisms to decrease energy consumption on massively parallel graphics processors for ray tracing. First, we use a streaming data model and configure part of the L2 cache into a ray stream memory to enable efficient data processing through ray reordering. This increases L1 hit rates and reduces off‐chip memory energy substantially through better management of off‐chip memory access patterns. To evaluate this model, we augment our architectural simulator with a detailed memory system simulation that includes accurate control, timing and power models for memory controllers and off‐chip dynamic random‐access memory . These details change the results significantly over previous simulations that used a simpler model of off‐chip memory, indicating that this type of memory system simulation is important for realistic simulations that involve external memory. Secondly, we employ reconfigurable special‐purpose pipelines that are constructed dynamically under program control. These pipelines use shared execution units that can be configured to support the common compute kernels that are the foundation of the ray tracing algorithm. This reduces the overhead incurred by on‐chip memory and register accesses. These two synergistic features yield a ray tracing architecture that reduces energy by optimizing both on‐chip and off‐chip memory activity when compared to a more traditional approach.

Bounding volume hierarchies (BVHs) are a popular acceleration structure choice for animated scenes rendered with ray tracing. This is due to the relative simplicity of refitting bounding volumes around moving geometry. However, the quality of such a refitted tree can degrade rapidly if objects in the scene deform or rearrange significantly as the animation progresses, resulting in dramatic increases in rendering times and a commensurate reduction in the frame rate. The BVH could be rebuilt on every frame, but this could take significant time. We present a method to efficiently extend refitting for animated scenes with tree rotations, a technique previously proposed for off-line improvement of BVH quality for static scenes. Tree rotations are local restructuring operations which can mitigate the effects that moving primitives have on BVH quality by rearranging nodes in the tree during each refit rather than triggering a full rebuild. The result is a fast, lightweight, incremental update algorithm that requires negligible memory, has minor update times, parallelizes easily, avoids significant degradation in tree quality or the need for rebuilding, and maintains fast rendering times. We show that our method approaches or exceeds the frame rates of other techniques and is consistently among the best options regardless of the animated scene.

Snooping and directory-based coherence protocols have become the de facto standard in chip multi-processors, but neither design is without drawbacks. Snooping protocols are not scalable, while directory protocols incur directory storage overhead, frequent indirections, and are more prone to design bugs. In this paper, we propose a novel coherence protocol that greatly reduces the number of coherence operations and falls back on a simple broadcast-based snooping protocol when infrequent coherence is required. This new protocol is based on the premise that most blocks are either private to a core or read-only, and hence, do not require coherence. This will be especially true for future large-scale multi-core machines that will be used to execute message-passing workloads in the HPC domain, or multiple virtual machines for servers. In such systems, it is expected that a very small fraction of blocks will be both shared and frequently written, hence the need to optimize coherence protocols for a new common case. In our new protocol, dubbed SWEL (protocol states are Shared, Written, Exclusivity Level), the L1 cache attempts to store only private or read-only blocks, while shared and written blocks must reside at the shared L2 level. These determinations are made at runtime without software assistance. While accesses to blocks banished from the L1 become more expensive, SWEL can improve throughput because directory indirection is removed for many common write-sharing patterns. Compared to a MESI based directory implementation, we see up to 15% increased performance, a maximum degradation of 2%, and an average performance increase of 2.5% using SWEL and its derivatives. Other advantages of this strategy are reduced protocol complexity (achieved by reducing transient states) and significantly less storage overhead than traditional directory protocols.

Ray tracing efficiently models complex illumination effects to improve visual realism in computer graphics. Typical modern GPUs use wide SIMD processing, and have achieved impressive performance for a variety of graphics processing including ray tracing. However, SIMD efficiency can be reduced due to the divergent branching and memory access patterns that are common in ray tracing codes. This paper explores an alternative approach using MIMD processing cores custom-designed for ray tracing. By relaxing the requirement that instruction paths be synchronized as in SIMD, caches and less frequently used area expensive functional units may be more effectively shared. Heavy resource sharing provides significant area savings while still maintaining a high MIMD issue rate from our numerous light-weight cores. This paper explores the design space of this architecture and compares performance to the best reported results for a GPU ray tracer and a parallel ray tracer using general purpose cores. We show an overall performance that is six to ten times higher in a similar die area.

A synthetic noise function is a key component of most computer graphics rendering systems. This pseudo-random noise function is used to create a wide variety of natural looking textures that are applied to objects in the scene. To be useful, the generated noise should be repeatable while exhibiting no discernible periodicity, anisotropy, or aliasing. However, noise with these qualities is computationally expensive and results in a significant fraction of the run time for scenes with rich visual complexity. We propose modifications to the standard algorithm for computing synthetic noise that improve the visual quality of the noise, and a parallel hardware implementation of this improved noise function that allows the use of reduced precision arithmetic during the noise computation. The result is a special-purpose function unit for producing synthetic noise that computes high-quality noise values approximately two orders of magnitude faster than software techniques. The circuit, using a commercial CMOS cell library in a 65nm process, would run at 1GHz and consume 325μm x 325μm of chip area.

Threaded Ray eXecution (TRaX) is a highly parallel multithreaded multicore processor architecture designed for real-time ray tracing. The TRaX architecture consists of a set of thread processors that include commonly used functional units (FUs) for each thread and that share larger FUs through a programmable interconnect. The memory system takes advantage of the application's read-only access to the scene database and write-only access to the frame buffer output to provide efficient data delivery with a relatively simple memory system. One specific motivation behind TRaX is to accelerate single-ray performance instead of relying on ray packets in single-instruction-multiple-data mode to boost throughput, which can fail as packets become incoherent with respect to the objects in the scene database. In this paper, we describe the TRaX architecture and our performance results compared to other architectures used for ray tracing. Simulated results indicate that a multicore version of the TRaX architecture running at a modest speed of 500 MHz provides real-time ray-traced images for scenes of a complexity found in video games. We also measure performance as secondary rays become less coherent and find that TRaX exhibits only minor slowdown in this case while packet-based ray tracers show more significant slowdown.