A multiplierless realization of IIR (infinite impulse response) filters is proposed. It is achieve by cascading biquad units (second-order filters), and each biquad unit is realized by a periodically time-varying state-space (PTV-SS) structure, preceded and followed by a first-order interpolator (hold circuit) and a decimator (down-sampler), respectively. The coefficients of the PTV-SS structure are powers of two, so that multiplications are performed by shift operations. Design examples show that the resulting frequency response closely matches that of the target filter with infinite-precision coefficients.>

It is pointed out that conventional digital filters, in which signal samples and filter coefficients are represented by 8- to 16-bit words, have some advantages for VLSI implementation due to the high hardware complexity of multibit multipliers. Incremental digital filters, based on delta modulation (DM) encoding, having emerged as a promising alternative to the conventional approach, because highly modular 'multiplier-free' structures can be built using incremental methods. A multiplier-free biquad filter structure is proposed which is suitable for VLSI implementation with low roundoff noise and low limit cycle operations.>

New classes of nonrecursive linear digital filters are proposed as alternatives to conventional methods for digital signal processing devices. In fact, the traditional approach, where signal samples are represented by 8-15 bit words, can be very expensive to implement due to the complexity of multibit multipliers and adders. Filter structures consisting of a transversal filter with tap coefficients restricted to - 1, 0, or + 1 and cascaded with simple recursive sections are proposed. Using a mean square error criterion, dynamic programming methods to select optimum sets of coefficient values for the taps are presented and evaluated. It is shown that these structures lend themselves to very simple hardware implementations and offer a valid alternative to the conventional filtering approach. Designs for several example filters are presented, and their implementation complexity is examined.

FIR filters with powers-of-two coefficients are attractive for cost-effective implementations. The performance of one such structure, the difference routing digital filter [8], is discussed. Using an SNR criterion, an optimal algorithm to select the value of the filter coefficients is presented. Results indicate that a 2-3 dB improvement in the SNR can be obtained with this new approach. In addition, the study gives some insight into the relationship between the filter sampling rate, the number of coefficients, and the size of the coefficient alphabet. In particular, it is seen that a tradeoff between the filter sampling rate and the size of the coefficient alphabet exists.

This paper examines the problems of carrier phase estimation and symbol timing estimation for carrier-type synchronous digital data signals, with tutorial objectives foremost. Carrier phase recovery for suppressed-carrier versions of double sideband (DSB), vestigial sideband (VSB), and quadrature amplitude modulation (QAM) signal formats is considered first. Then the problem of symbol timing recovery for a baseband pulse-amplitude modulation (PAM) signal is examined. Timing recovery circuits based on elementary statistical properties are discussed as well as timing recovery based on maximum-likelihood estimation theory. A relatively simple approach to evaluation of timing recovery circuit performance in terms of rms jitter of the timing parameters is presented.

The detection of pulse amplitude modulation (PAM) carrier signals requires accurate symbol timing and carrier phase references. In most cases, it is desired to estimate these parameters directly from measurements on the received data signal. This paper adds to and unifies the theory of maximum likelihood [ML] estimation as applied to PAM timing and phase recovery. Several different estimation strategies are considered. Data-aided [DA] estimators are found which assume the transmitted data symbols are known at the receiver. Nondata-aided [NDA] estimators are found which require only knowledge of the statistics of the transmitted data symbols. Structures for estimation of symbol timing, carrier phase, and joint estimation of timing and phase are presented. The estimators are evaluated on the basis of their error variances. Relatively simple approximate expressions for these error variances are presented. These expressions allow the comparison of the effects of excess bandwidth, different modulation schemes, DA versus NDA recovery, and joint estimation versus estimation of only one parameter. A practical implementation of the ML estimator, termed a pseudo-maximum likelihood (PML) estimator, is proposed and analyzed. The performance of the PML estimator is shown to include a noise-independent, data-dependent jitter which dominates in many cases of practical interest.

Many communication and control systems employ signal formats that involve some form of periodic processing operation. Signals produced by samplers, scanners, multiplexors, and modulators are familiar examples. Often these signals are appropriately modeled by random processes that are cyclostationary (CS), i.e., processes with statistical parameters, such as mean and autocorrelation, that fluctuate periodically with time. In this paper we examine two methods for representing nonstationary processes that reveal the special properties possessed by CS processes. These representations are the harmonic series representation (HSR) and the translation series representation (TSR). We show that the HSR is particularly appropriate for characterizing the structural properties of CS processes and that the TSR provides natural models for many types of communication signal formats. The advantages gained by modeling signals as CS processes rather than stationary processes is illustrated by consideration of the optimum filtering problem. We present general solutions for filters that minimize mean-square error for continuous-waveform estimation, and we discuss several specific examples for the particular case of additive noise. These examples demonstrate improvement in performance over that of filter designs based on stationary models for the signal processes.

A new technique is presented for evaluating the performance of a popular type of timing recovery circuit for baseband synchronous pulse amplitude modulation (PAM) data signals. The timing circuit consists of a square-law device followed by a narrowband filter tuned to the pulse repetition frequency along with provision for reshaping the pulses entering the timing path (prefiltering). The output of the timing circuit is a nearly sinusoidal timing wave whose zero crossings indicate the appropriate sampling instants for demodulation of the PAM signal. For a random data sequence, the timing wave exhibits phase fluctuations which are strongly dependent on the pulse shapes entering the timing path and the passband shape of the narrow-band filter. Expressions for rms phase fluctuation in the timing wave as a function of the prefiltering and postfiltering characteristics of the filters preceding and following the square-law device are presented. These expressions have a form which is especially suitable for studying the case where the baseband PAM signal is band-limited to frequencies less than the pulse repetition frequency. A condition on prefiltering and postfiltering which gives error-free timing recovery is presented. Results obtained from some specific examples serve to illustrate several aspects of the timing recovery problem.