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Rahul Nim

dblp:116/7046 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel computing › parallel program analysis
dynamic dependence analysis
0.011998
Techniques for Speculative Run-Time Parallelization of Loops · SC 1998
Parallel and multicore computing
speculative parallelization
0.011998
Techniques for Speculative Run-Time Parallelization of Loops · SC 1998
Compilers and program optimization › parallelization
automatic parallelization
0.011998
Techniques for Speculative Run-Time Parallelization of Loops · SC 1998

Methods — techniques the papers use, named apart from their topics

static dependence analysis · 0.0speculative execution · 0.0
YearPublicationVenuePosition
1998 Techniques for Speculative Run-Time Parallelization of Loops
abstract
This paper presents a set of new run-time tests for speculative parallelization of loops that defy parallelization based on static analysis alone. It presents a novel method for speculative array privatization that is not only more efficient than previous methods when the speculation is correct, but also does not require rolling back the computation in case the variable is found not to be privatizable. We present another method for speculative parallelization which can overcome all loop-carried anti and output dependences, with even lower overhead than previous techniques which could not break such dependences. Again, in order to ameliorate the problem of paying a heavy penalty for speculatively parallelizing loops that turn out to be serial, we present a technique that enables early detection of loop-carried dependences. Our experimental results from a preliminary implementation of these tests on an IBM G30 SMP machine show a significant reduction in the penalty paid for mis-speculation, from roughly 50% to between 2% and 18% of the serial execution time. For parallel loops, we obtain about the same, and often, even better performance relative to the previous methods, making our techniques extremely attractive.
Rahul Nim
SC2