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Robert A. Thacker

dblp:116/9936 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 91% Integrated circuit design · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
analog/mixed-signal verification
0.112011
Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011
Electronic design automation › hardware verification and test
formal verification
0.112011
Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011
Electronic design automation
hardware verification and test
0.112011
Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011
Integrated circuit design
analog and mixed-signal circuits
0.012011
Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011

Methods — techniques the papers use, named apart from their topics

zone-based state space exploration · 0.1warping · 0.1labeled hybrid petri nets · 0.1
YearPublicationVenuePosition
2011 Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets
abstract
Mixed-signal designs integrate digital and analog circuits which complicates the already difficult verification problem. This paper presents a model, labeled hybrid Petri nets (LHPNs), that is developed to model this heterogeneous set of components. To support formal verification, this paper presents an efficient zone-based state space exploration algorithm for LHPNs. This algorithm uses a process known as warping which allows zones to describe continuous variables changing at variable rates. Finally, this paper describes the application of this algorithm to analog/mixed-signal circuit examples.
Scott Little, David Walter, Chris J. Myers, Robert A. Thacker, Satish Batchu, Tomohiro Yoneda
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4
2009 A new verification method for embedded systems
abstract
Verification of embedded systems is complicated by the fact that they are composed of digital hardware, analog sensors and actuators, and low level software. In order to verify the interaction of these heterogeneous components, it would be beneficial to have a single modeling formalism that is capable of representing all of these components. To address this need, this paper describes an extended labeled hybrid Petri net (LHPN) model that includes constructs for Boolean, discrete, and continuous variables as well as constructs to model timing. This paper also presents a method to verify these extended LHPNs. Finally, this paper presents a case study to illustrate the application of this model to the verification of a fault-tolerant temperature sensor.
Robert A. Thacker, Chris J. Myers, Kevin R. Jones, Scott Little
ICCD1