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Masaya Notomi

dblp:117/5778 · DBLP profile ↗
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6ranked-venue papers
1as first author
3since 2021 · last 2025
0000-0002-4255-4656ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
2 papers
Deep learning architectures and training · 46% Optimization for machine learning · 46% Efficient and distributed learning · 9%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Emerging computing paradigms · 35% Energy-efficient computing · 35% Integrated circuit design · 30%
Network and information security
1 paper
Hardware security and side channels · 100%
Computer networks
1 paper
Optical networks · 100%

Topics — the 10 heaviest of 12, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Optimization for machine learning › black-box optimization
zeroth-order optimization
0.912025
Layered-Parameter Perturbation for Zeroth-Order Optimization of Optical Neural Networks · AAAI 2025
Emerging computing paradigms › optical computing
optical neural networks
0.612022
Power-aware pruning for ultrafast, energy-efficient, and accurate optical neural network design · DAC 2022
Energy-efficient computing › low-power design
power optimization
0.612022
Power-aware pruning for ultrafast, energy-efficient, and accurate optical neural network design · DAC 2022
Hardware security and side channels › side-channel attack
electromagnetic side channel
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Hardware security and side channels
side-channel attack
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Integrated circuit design › photonic integrated circuits
photonic integrated circuit design
0.512021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Machine learning › Efficient and distributed learning › model compression
pruning
0.212022
Power-aware pruning for ultrafast, energy-efficient, and accurate optical neural network design · DAC 2022
Hardware security and side channels
tamper-resistant hardware
0.112021
Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics · DAC 2021
Optical networks
photonic integrated circuits
0.112011
Strong Light Confinement With Periodicity · Proc. IEEE 2011
Optical networks
optical signal processing
0.012011
Strong Light Confinement With Periodicity · Proc. IEEE 2011

Methods — techniques the papers use, named apart from their topics

power-aware edge pruning · 1.1optoelectronic circuit simulation · 1.1phase modulation · 1.0electronically-controlled phase shifter · 1.0zeroth-order optimization · 0.9covariance matrix design · 0.9photonic bandgap · 0.1mode-gap cavity · 0.1
YearPublicationVenuePosition
2025 Layered-Parameter Perturbation for Zeroth-Order Optimization of Optical Neural Networks
abstract
Optical neural networks (ONNs) have attracted great attention due to their low power consumption and high-speed processing. When training an ONN implemented on a chip with possible fabrication variations, the well-known backpropagation algorithm cannot be executed accurately because the perfect information inside the chip cannot be observed. Instead, we employ a black-box optimization method such as zeroth-order (ZO) optimization. In this paper, we first discuss how ONN parameters should be perturbed to search for better values in a black-box manner. Conventionally, parameter perturbations are sampled from a normal distribution with an identity covariance matrix. This is plausible if the parameters are not interrelated in a module, like a linear module of an ordinary neural network. However, this is not the best way for ONN modules with layered parameters, which are interrelated by optical paths. We then propose to perturb the parameters by a normal distribution with a special covariance matrix computed by our novel method. The covariance matrix is designed so that the perturbations appearing at the module output caused by the parameter perturbations become as isotropic as possible to uniformly search for better values. Experimental results show that the proposed method using the special covariance matrix significantly outperformed conventional methods.
Hiroshi Sawada, Kazuo Aoyama, Masaya Notomi
AAAI3
2022 Power-aware pruning for ultrafast, energy-efficient, and accurate optical neural network design
abstract
With the rapid progress of the integrated nanophotonics technology, the optical neural network (ONN) architecture has been widely investigated. Although the ONN inference is fast, conventional densely connected network structures consume large amounts of power in laser sources. We propose a novel ONN design method that finds an ultrafast, energy-efficient, and accurate ONN structure. The key idea is power-aware edge pruning that derives the near-optimal numbers of edges in the entire network. Optoelectronic circuit simulation demonstrates the correct functional behavior of the ONN. Furthermore, experimental evaluations using tensor-flow show the proposed methods achieved 98.28% power reduction without significant loss of accuracy.
Naoki Hattori, Yutaka Masuda, Tohru Ishihara, Akihiko Shinya, Masaya Notomi
DAC5
2021 Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics
abstract
A tamper-resistant logical operation method based on integrated nanophotonics is proposed focusing on electromagnetic side-channel attacks. In the proposed method, only the phase of each optical signal is modulated depending on its logical state, which keeps the power of optical signals in optical logic circuits constant. This provides logic-gate-level tamper resistance which is difficult to achieve with CMOS circuits. An optical implementation method based on electronically-controlled phase shifters is then proposed. The electrical part of proposed circuits achieves 300 times less instantaneous current change, which is proportional to intensity of the leaked electromagnetic wave, than a CMOS logic gate.
Jun Shiomi, Shuya Kotsugi, Boyu Dong, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi
DAC6
2019 BDD-based synthesis of optical logic circuits exploiting wavelength division multiplexing
abstract
Optical circuits using nanophotonic devices attract significant interest due to its ultra-high speed operation. As a consequence, the synthesis methods for the optical circuits also attract increasing attention. However, existing methods for synthesizing optical circuits mostly rely on straight-forward mappings from established data structures such as Binary Decision Diagram (BDD). The strategy of simply mapping a BDD to an optical circuit sometimes results in an explosion of size and involves significant power losses in branches and optical devices. To address these issues, this paper proposes a method for reducing the size of BDD-based optical logic circuits exploiting wavelength division multiplexing (WDM). The paper also proposes a method for reducing the number of branches in a BDD-based circuit, which reduces the power dissipation in laser sources. Experimental results obtained using a partial product accumulation circuit in parallel multipliers demonstrates significant advantages of our method over existing approaches in terms of area and power consumption.
Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi
ASP-DAC6
2018 An Integrated Nanophotonic Parallel Adder
abstract
Integrated optical circuits with nanophotonic devices have attracted significant attention due to their low power dissipation and light-speed operation. With light interference and resonance phenomena, the nanophotonic device works as a voltage-controlled optical pass-gate like a pass-transistor. This article first introduces the concept of optical pass-gate logic and then proposes a parallel adder circuit based on optical pass-gate logic. Experimental results obtained with an optoelectronic circuit simulator show the advantages of our optical parallel adder circuit over a traditional CMOS-based parallel adder circuit.
Tohru Ishihara, Akihiko Shinya, Koji Inoue, Kengo Nozaki, Masaya Notomi
ACM J. Emerg. Technol. Comput. Syst.5
2011 Strong Light Confinement With Periodicity
abstract
Photonic crystals were proposed over two decades ago to realize strong light confinement via their perfect photonic bandgaps, but the expected ultrahigh-Qwavelength-sized cavities were achieved just recently in a slightly different system that has only a partial bandgap, more specifically, a modulated mode-gap cavity in a 2-D photonic crystal. It is now possible to store photons for over a nanosecond in a wavelength-sized volume for this type of cavity, which has not been realized in other systems. The same confinement mechanism has provided various interesting cavities including air-core cavities, index-modulation-induced cavities, and dynamic cavities. We discuss the impact and possible applications of the achieved strong light confinement. First, it has a strong impact on photonic integrated circuits and photonic network-on-chip (NoC) applications because these cavities enable us to realize tiny, low-power-consumption, and integratable photonic devices, which are hard to realize conventionally. It is next shown that an ultrahigh-Qcavity system constitutes an extreme slow-light medium. It is also shown that ultrahigh-Qcavities enable the adiabatic tuning of light, which makes it possible to manipulate optical signals very differently from conventional optics. Finally, other possible systems promising for strong light confinement are investigated, such as 1-D photonic crystals and photonic amorphous structures without any periodicity.
Masaya Notomi
Proc. IEEE1