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Justin R. Funston

dblp:118/5393 · DBLP profile ↗
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5ranked-venue papers
2as first author
0since 2021 · last 2018
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 2 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Cloud and datacenter computing · 58% Memory systems · 28% Processor architecture and microarchitecture · 14%
Software engineering, system software, and programming languages
3 papers
Operating systems · 100%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Operating systems › resource management
memory management
0.422014
Large Pages May Be Harmful on NUMA Systems · USENIX ATC 2014
Traffic management: a holistic approach to memory placement on NUMA systems · ASPLOS 2013
Cloud and datacenter computing
cluster resource management and scheduling
0.312018
Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model · USENIX ATC 2018
Cloud and datacenter computing › virtualization › virtual machine management
virtual machine placement
0.312018
Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model · USENIX ATC 2018
Operating systems › resource management › process management › CPU scheduling
thread scheduling
0.212016
The Linux scheduler: a decade of wasted cores · EuroSys 2016
Operating systems › resource management › memory management
huge pages
0.212014
Large Pages May Be Harmful on NUMA Systems · USENIX ATC 2014
Memory systems › non-uniform memory access
NUMA data placement
0.212013
Traffic management: a holistic approach to memory placement on NUMA systems · ASPLOS 2013
Processor architecture and microarchitecture
multicore design
0.222018
Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model · USENIX ATC 2018
Large Pages May Be Harmful on NUMA Systems · USENIX ATC 2014
Memory systems
non-uniform memory access
0.222018
Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model · USENIX ATC 2018
Large Pages May Be Harmful on NUMA Systems · USENIX ATC 2014
Operating systems
resource management
0.112016
The Linux scheduler: a decade of wasted cores · EuroSys 2016

Methods — techniques the papers use, named apart from their topics

trace-driven simulation · 0.3optimization modeling · 0.3kernel implementation · 0.3scheduling visualization · 0.2online invariant checking · 0.2
YearPublicationVenuePosition
2018 Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model
Justin R. Funston, Maxime Lorrillere, Alexandra Fedorova, Baptiste Lepers, David Vengerov, Jean-Pierre Lozi, Vivien Quéma
USENIX ATC1
2016 The Linux scheduler: a decade of wasted cores
abstract
As a central part of resource management, the OS thread scheduler must maintain the following, simple, invariant: make sure that ready threads are scheduled on available cores. As simple as it may seem, we found that this invariant is often broken in Linux. Cores may stay idle for seconds while ready threads are waiting in runqueues. In our experiments, these performance bugs caused many-fold performance degradation for synchronization-heavy scientific applications, 13% higher latency for kernel make, and a 14-23% decrease in TPC-H throughput for a widely used commercial database. The main contribution of this work is the discovery and analysis of these bugs and providing the fixes. Conventional testing techniques and debugging tools are ineffective at confirming or understanding this kind of bugs, because their symptoms are often evasive. To drive our investigation, we built new tools that check for violation of the invariant online and visualize scheduling activity. They are simple, easily portable across kernel versions, and run with a negligible overhead. We believe that making these tools part of the kernel developers' tool belt can help keep this type of bug at bay.
Jean-Pierre Lozi, Baptiste Lepers, Justin R. Funston, Fabien Gaud, Vivien Quéma, Alexandra Fedorova
EuroSys3
2014 Large Pages May Be Harmful on NUMA Systems
Fabien Gaud, Baptiste Lepers, Jeremie Decouchant, Justin R. Funston, Alexandra Fedorova, Vivien Quéma
USENIX ATC4
2013 Traffic management: a holistic approach to memory placement on NUMA systems
abstract
NUMA systems are characterized by Non-Uniform Memory Access times, where accessing data in a remote node takes longer than a local access. NUMA hardware has been built since the late 80's, and the operating systems designed for it were optimized for access locality. They co-located memory pages with the threads that accessed them, so as to avoid the cost of remote accesses. Contrary to older systems, modern NUMA hardware has much smaller remote wire delays, and so remote access costs per se are not the main concern for performance, as we discovered in this work. Instead, congestion on memory controllers and interconnects, caused by memory traffic from data-intensive applications, hurts performance a lot more. Because of that, memory placement algorithms must be redesigned to target traffic congestion. This requires an arsenal of techniques that go beyond optimizing locality. In this paper we describe Carrefour, an algorithm that addresses this goal. We implemented Carrefour in Linux and obtained performance improvements of up to 3.6 relative to the default kernel, as well as significant improvements compared to NUMA-aware patchsets available for Linux. Carrefour never hurts performance by more than 4% when memory placement cannot be improved. We present the design of Carrefour, the challenges of implementing it on modern hardware, and draw insights about hardware support that would help optimize system software on future NUMA systems.
Mohammad Dashti 0002, Alexandra Fedorova, Justin R. Funston, Fabien Gaud, Renaud Lachaize, Baptiste Lepers, Vivien Quéma, Mark Roth
ASPLOS3
2012 An SMT-Selection Metric to Improve Multithreaded Applications' Performance
abstract
Simultaneous multithreading (SMT) increases CPU utilization and application performance in many circumstances, but it can be detrimental when performance is limited by application scalability or when there is significant contention for CPU resources. This paper describes an SMT-selection metric that predicts the change in application performance when the SMT level and number of application threads are varied. This metric is obtained online through hardware performance counters with little overhead, and allows the application or operating system to dynamically choose the best SMT level. We have validated the SMT-selection metric using a variety of benchmarks that capture various application characteristics on two different processor architectures. Our results show that the SMT-selection metric is capable of predicting the best SMT level for a given workload in 90% of the cases. The paper also shows that such a metric can be used with a scheduler or application optimizer to help guide its optimization decisions.
Justin R. Funston, Kaoutar El Maghraoui, Joefon Jann, Pratap Pattnaik, Alexandra Fedorova
IPDPS1