Bipartite graphs serve as a natural model for representing relationships between two different types of entities. When analyzing bipartite graphs, butterfly counting is a fundamental research problem that aims to count the number of butterflies (i.e., 2x2 bicliques) in a given bipartite graph. While this problem has been extensively studied in the literature, existing algorithms usually necessitate access to a large portion of the entire graph, presenting challenges in real scenarios where graphs are extremely large and I/O costs are expensive. In this paper, we study the butterfly counting problem under the query model, where the following query operations are permitted: degree query, neighbor query, and vertex-pair query. We propose TLS, a practical two-level sampling algorithm that can estimate the butterfly count accurately while accessing only a limited graph structure, achieving significantly lower query costs under the standard query model. TLS also incorporates several key techniques to control the variance, including "small-degree-first sampling" and "wedge sampling via small subsets". To ensure theoretical guarantees, we further introduce two novel techniques: "heavy-light partition" and "guess-and-prove", integrated into TLS. With these techniques, we prove that the algorithm can achieve a (1+eps) accuracy for any given approximation parameter 0 < eps < 1 on general bipartite graphs with a promised time and query complexity. In particular, the promised time is sublinear when the input graph is dense enough. Extensive experiments on 15 datasets demonstrate that TLS delivers robust estimates with up to three orders of magnitude lower query costs and runtime compared to existing solutions.

As software is widely used in daily life, bugs can introduce catastrophic consequences. Researchers have conducted empirical studies to delve into bug characteristics, exploring topics such as buggy locations, symptoms, causes, and repair patterns. To attract users, many applications have implementations in different languages. If an implementation has a bug, other implementations can have similar bugs. In this article, we call such cross-language clone bugs mirror bugs. Understanding mirror bugs is crucial, as they offer insights into broader bug patterns. Still, no prior study has explored mirror bugs, leaving several research questions unanswered. For instance, can bug fixes in one language help detect and repair bugs in other languages? To address these questions, we conducted the first empirical study analyzing mirror bugs. Our investigation focused on 638 bugs from four projects, implemented in both Java and C#. Our study presents answers to five interesting research questions. For instance, some programmers actively fix mirror bugs even without tool support. Consequently, there is a timely need for tools that assist in detecting mirror bugs. Following this insight, we manually identified and implemented the patches of nine new mirror bugs. Among them, five patches are already accepted by programmers.

As a paradigm of end-user programming, lowcode development has attracted attention from academics and enterprises. Consulting firms estimate that this paradigm can have great business value and that many large enterprises can switch to low-code development. To understand the emerging paradigm, researchers conducted various empirical studies about low-code development. Still, most studies analyze bugs in lowcode development platforms. Although these studies are related, low-code development platforms are classical programs, not lowcode applications. Several other studies analyze how programmers perceive low-code applications, but do not provide direct analysis. As low-code applications are typically commercial, most low-code projects are not open source. It is difficult to collect the subjects, and many questions are still open. In this paper, we propose the first study on bugs in lowcode applications. To overcome the above-mentioned challenge, we collect 8 actively maintained low-code projects from our industrial partner. From the 8 projects, we collected 248 bugs from our industrial partner and analyzed their symptoms, causes, and repairs. Our study derives 7 interesting findings. For instance, we find that 78.23 % of low-code bugs are related to human-computer interactions. The result indicates that GUI testing can be critical in detecting bugs in low-code applications. As another example, we find that even if programs are developed on low-code platforms, modifying source files is necessary to fix 78.23 % of low-code bugs.

Compilers are essential in daily development, but their bugs can introduce hidden bugs to many software projects. As compiler bugs are important, researchers have conducted various empirical studies to understand their characteristics. Most of the prior studies analyze only the bug reports and patches of compilers. From such sources, they analyze the root causes, locations, and repairs of compiler bugs. Their findings are useful for understanding compiler bugs themselves, but to the best of our knowledge, the impact of compiler bugs is rarely explored. For example, before compiler bugs are fixed, programmers would bypass such bugs, but no prior study analyzes the workarounds for compiler bugs. To complement the prior studies, in this paper, we analyze how the bugs of two mainstream compilers, gcc and llvm, affect real development. Besides the bug reports and patches of compilers, in this study, from 603 GitHub projects, we collect 806 commits whose messages mention compiler bugs. From the dataset, we analyze how compiler bugs affect real projects. Furthermore, we manually analyze 219 commits whose messages explicitly mention compiler bugs. Our results lead to eight useful findings for programmers, compiler developers, and researchers. For instance, based on our findings, we suggest that it is critical to analyze the long-term impact of compiler bugs. Our story about a gcc bug confirms that compiler bugs can affect the compilations of projects even after these compiler bugs have already been fixed.

Temporal relational data, perhaps the most commonly used data type in industrial machine learning applications, needs labor-intensive feature engineering and data analyzing for giving precise model predictions. An automatic machine learning framework is needed to ease the manual efforts in fine-tuning the models so that the experts can focus more on other problems that really need humans' engagement such as problem definition, deployment, and business services. However, there are three main challenges for building automatic solutions for temporal relational data: 1) how to effectively and automatically mining useful information from the multiple tables and the relations from them? 2) how to be self-adjustable to control the time and memory consumption within a certain budget? and 3) how to give generic solutions to a wide range of tasks? In this work, we propose our solution that successfully addresses the above issues in an end-to-end automatic way. The proposed framework, AutoSmart, is the winning solution to the KDD Cup 2019 of the AutoML Track, which is one of the largest AutoML competition to date (860 teams with around 4,955 submissions). The framework includes automatic data processing, table merging, feature engineering, and model tuning, with a time and memory controller for efficiently and automatically formulating the models. The proposed framework outperforms the baseline solution significantly on several datasets in various domains.

Medium-voltage dc (MVdc) distribution system is considered as the promising power architecture of future shipboard power system. Fault-tolerance ability is of great importance for power system on ships. In this paper, zonal dc-dc conversion system based on modular multilevel converter (MMC) and three-phase bridge rectifier are proposed with its hierarchical fault-tolerant scheme. The topology configurations of the front-end MMC with multiwinding medium frequency transformer under normal and postfault circumstances are presented. The reconfiguration scheme and fault-tolerant control strategy are also proposed to ride-through submodule (SM) level fault, phase level fault and bus level fault. Based on the hierarchical fault-tolerant scheme, redundant configuration of the MMC SM is further analyzed with the hierarchical reliability modeling. The effectiveness of the proposed control strategy is verified by the experimental results.

In recent years, railway power conditioner (RPC) has been used to improve the power quality of a traction power system. In engineering application of RPC, mismatches between parameters used in controller and actual values are inevitable, which will increase the difficulty of current controller design and deteriorate compensation performance. In this paper, a passivity-based control (PBC) system is studied for multilevel RPC to enhance its tolerance for mismatches. According to the topology of multilevel RPC, equivalent electrical and mathematical models are developed. To employ PBC, Euler-Lagrange system model of RPC is established by Park (αβ/dq) transformation, and the passivity of RPC and stability of PBC are proved. On this basis, the robustness of PBC is analyzed and criteria for damping selection are derived. Finally, simulation and experiments have been carried out to verify the structure and control method in the paper.

As the fluctuation of sub-module capacitance voltage when MMC operates at low frequency, the application of MMC in the field of motor drive has been limited. Therefore, this paper proposes a low frequency control method for the MMC with tuned filter circuit. Based on the theoretical analysis for this tuned filter, the circulating current of 2ndfrequency could be suppressed effectively at rated frequency. The tuned filter also enables the minimum voltage that is adopted to control high frequency circulating current at low frequency by feasible parameters. In addition, design of circulating current controller is simplified, because the high frequency circulating current with mixed and variable frequency is no longer needed in this strategy. Zero-error tracking to the hybrid reference current is achieved by proportional integral resonant (PIR) control. Finally, the accuracy of analysis and effectiveness of proposed strategy are proved by a prototype experiment.

In the VSC-HVDC system supplying power to passive network, the dc-side of the system is prone to oscillation and even instability, which is resulted from the constant power characteristic of the inverter station and the interactions of the dc impedance between converter stations. In view of this, firstly, the output impedance model of the rectifier station, dc cable impedance model and the input impedance model of the inverter station are built in this paper. Then, the effect on system stability caused by the length of the dc cable, and the output impedance of the rectifier station is examined by the impedance-based Nyquist stability criterion. And the reason why the rectifier station fails to mitigate oscillation on the dc-side of the VSC-HVDC system using traditional virtual resistance stability control method is revealed. Based on the virtual resistance stability control method, a resistive-inductive impedance active stabilization method aiming at rectifier station is proposed. This method can effectively mitigate the oscillation on the dc-side of the VSC-HVDC system without affecting the load performance of the inverter station. Finally, simulation results validate the proposed method and analysis in this paper.

For LCL-type distributed generation (DG) systems connected to weak grid, a novel two frequency-bandwidths real-time sensitive inverter-current-feedback (TFBRTS-ICF) control method is proposed to enhance the system reliability and robustness, which mainly includes the synchronous reference frame quasi-proportional-integral (SRFQPI) control, un-attenuated inverter-current-feedback active damping (UICFAD) control, and high-sensitivity real-time PWM algorithm. The SRFQPI control can compensate reactive power, and regulate the instantaneous current without steady-state error regardless of the fundamental frequency fluctuation. The UICFAD control can suppress the LCL-resonance peak well without requiring additional sensors. The proposed PWM algorithm can solve the robust problem of the UICFAD controller against grid-impedance variation through removing the computation delay. Meanwhile, the proposed PWM algorithm can achieve a full range of duty-ratio between 0~1 and offer half of switching period for the inverter-current sampling and the duty-ratio calculating, which is easy to implement using a digital microcontroller. Experimental results confirm the theoretical expectations and the effectiveness of the proposed method.

Economic development level has important effect on the institution. And economic development is an adjustment process of stock variable. Thus, it is difficult to achieve desired results for the institution transplanting. Under different conditions and during different period, the relationship between the institution and economic development is different. A theoretical model on causal relationship between institution and economic development was established, based on VAR (vector auto-regression) method, and the relationship was affirmed.