Girish N. Patel

Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data.

VLDB 2026 Research / reviewers in the wild / expert

dblp:12/4899 · DBLP profile ↗

← Back

7ranked-venue papers

5as first author

0since 2021 · last 2006

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 5 · 3 first-authorSystems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems 3 papers		Emerging computing paradigms · 78% Integrated circuit design · 22%
Artificial intelligence 2 papers		Motion planning and robot control · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

Topic	Weight	Papers	Last	Evidence papers
Emerging computing paradigms neuromorphic computing	0.1	3	1999	Bifurcation Analysis of a Silicon Neuron · NIPS 1999 A Neuromorphic VLSI System for Modeling the Neural Control of Axial Locomotion · NIPS 1999 Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling · NIPS 1997
Emerging computing paradigms › neuromorphic computing › neuromorphic circuits silicon neuron	0.0	1	1999	Bifurcation Analysis of a Silicon Neuron · NIPS 1999
Integrated circuit design › analog and mixed-signal circuits analog VLSI	0.0	1	1997	Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling · NIPS 1997
Robotics › Motion planning and robot control locomotion control	0.0	2	1999	A Neuromorphic VLSI System for Modeling the Neural Control of Axial Locomotion · NIPS 1999 Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling · NIPS 1997
Integrated circuit design › analog and mixed-signal circuits analog circuit design	0.0	1	1999	Bifurcation Analysis of a Silicon Neuron · NIPS 1999

Methods — techniques the papers use, named apart from their topics

nearest-neighbor coupling · 0.0bifurcation analysis · 0.0

Year	Publication	Venue	Position
2006	An asynchronous architecture for modeling intersegmental neural communication abstract This paper presents an asynchronous VLSI architecture for modeling the oscillatory patterns seen in segmented biological systems. The architecture emulates the intersegmental synaptic connectivity observed in these biological systems. The communications network uses address-event representation (AER), a common neuromorphic protocol for data transmission. The asynchronous circuits are synthesized using communicating hardware processes (CHP) procedures. The architecture is scalable, supports multichip communication, and operates independent of the type of silicon neuron (spiking or burst envelopes). A 16-segment prototype system was developed, tested, and implemented; data from this system are presented. Girish N. Patel, Michael S. Reid, David E. Schimmel, Stephen P. DeWeerth	IEEE Trans. Very Large Scale Integr. Syst.	1
2003	A bifurcation of a synchronous oscillations into a torus in a system of two mutually inhibitory aVLSI neurons: experimental observation Vladimir E. Bondarenko, Gennady S. Cymbalyuk, Girish N. Patel, Stephen P. DeWeerth, Ronald L. Calabrese	Neurocomputing	3
2000	Modeling Alternation to Synchrony with Inhibitory Coupling: A Neuromorphic VLSI Approach abstract We developed an analog very large-scale integrated system of two mutually inhibitory silicon neurons that display several different stable oscillations. For example, oscillations can be synchronous with weak inhibitory coupling and alternating with relatively strong inhibitory coupling. All oscillations observed experimentally were predicted by bifurcation analysis of a corresponding mathematical model. The synchronous oscillations do not require special synaptic properties and are apparently robust enough to survive the variability and constraints inherent in this physical system. In biological experiments with oscillatory neuronal networks, blockade of inhibitory synaptic coupling can sometimes lead to synchronous oscillations. An example of this phenomenon is the transition from alternating to synchronous bursting in the swimming central pattern generator of lamprey when synaptic inhibition is blocked by strychnine. Our results suggest a simple explanation for the observed oscillatory transitions in the lamprey central pattern generator network: that inhibitory connectivity alone is sufficient to produce the observed transition. Gennady S. Cymbalyuk, Girish N. Patel, Ronald L. Calabrese, Stephen P. DeWeerth, Avis H. Cohen	Neural Comput.	2
1999	A Neuromorphic VLSI System for Modeling the Neural Control of Axial Locomotion Girish N. Patel, Edgar A. Brown, Stephen P. DeWeerth	NIPS	1
1999	Bifurcation Analysis of a Silicon Neuron Girish N. Patel, Gennady S. Cymbalyuk, Ronald L. Calabrese, Stephen P. DeWeerth	NIPS	1
1997	Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling Girish N. Patel, Jeremy Holleman, Stephen P. DeWeerth	NIPS	1
1995	An Analog VLSI Loser-Take-All Circuit abstract An analog circuit that performs a loser-take-all computation is presented. This circuit takes an array of analog input current and produces an array of binary output voltages/currents. The circuit functions such that the output at the node with the minimum input current is a non-zero constant while all of the other outputs are equal to zero. This circuit can also be used to compute the global minimum of the input array. Theory of operation for this circuit is developed and compared with experimental results. Girish N. Patel, Stephen P. DeWeerth	ISCAS	1