Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Daniel Chen 0001

dblp:12/5088-1 · DBLP profile ↗
← Back
10ranked-venue papers
1as first author
0since 2021 · last 2017
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 7 · 1 first-authorSystems, architecture and hardware · 5Software engineering, systems software and programming languages · 3 · 1 first-authorArtificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Reconfigurable computing and FPGAs · 67% Hardware reliability and fault tolerance · 29% Electronic design automation · 4%
Software engineering, system software, and programming languages
1 paper
Program analysis · 100%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Bioinformatics and computational biology · 100%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs
FPGA accelerator
0.312017
ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only) · FPGA 2017
Reconfigurable computing and FPGAs › FPGA accelerator
short read mapping
0.312017
ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only) · FPGA 2017
Program analysis
dynamic analysis
0.112011
Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis · IEEE Trans. Dependable Secur. Comput. 2011
Program analysis › dynamic analysis › trace analysis
execution trace analysis
0.112011
Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis · IEEE Trans. Dependable Secur. Comput. 2011
Hardware reliability and fault tolerance
error detection
0.112011
Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis · IEEE Trans. Dependable Secur. Comput. 2011
Hardware reliability and fault tolerance
soft errors
0.112011
Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis · IEEE Trans. Dependable Secur. Comput. 2011
Bioinformatics and computational biology › sequence analysis
read mapping
0.112017
ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only) · FPGA 2017
Bioinformatics and computational biology
sequence alignment
0.112017
ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only) · FPGA 2017
Electronic design automation
hardware synthesis
0.012011
Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis · IEEE Trans. Dependable Secur. Comput. 2011

Methods — techniques the papers use, named apart from their topics

programmable hardware acceleration · 0.6rule-based templates · 0.2probability model · 0.2fault injection · 0.2
YearPublicationVenuePosition
2017 ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only)
Subho S. Banerjee, Mohamed El-Hadedy 0001, Jong Bin Lim, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Deming Chen, Ravishankar K. Iyer
FPGA4
2017 Attack Induced Common-Mode Failures on PLC-Based Safety System in a Nuclear Power Plant: Practical Experience Report
abstract
This paper demonstrates attack induced common-mode failures on an industrial-grade (Tricon) Triple-Modular-Redundant PLC (programmable logic controller) and its impact in a Nuclear Power Plant settings. The attack exploits the fact that during the configuration phase the same control logic is downloaded to all three redundant modules. We describe how an attacker can exploit this vulnerability to embed malicious control logic and how to trigger the attack. The feasibility and the attack impact are evaluated on a testbed, which includes the Tricon PLC as part of a safety protection system in a simulated nuclear power plant.
Bernard Lim, Daniel Chen 0001, Yongkyu An, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
PRDC2
2016 Targeted Attacks on Teleoperated Surgical Robots: Dynamic Model-Based Detection and Mitigation
abstract
This paper demonstrates targeted cyber-physical attacks on teleoperated surgical robots. These attacks exploit vulnerabilities in the robot's control system to infer a critical time during surgery to drive injection of malicious control commands to the robot. We show that these attacks can evade the safety checks of the robot, lead to catastrophic consequences in the physical system (e.g., sudden jumps of robotic arms or system's transition to an unwanted halt state), and cause patient injury, robot damage, or system unavailability in the middle of a surgery. We present a model-based analysis framework that can estimate the consequences of control commands through real-time computation of robot's dynamics. Our experiments on the RAVEN II robot demonstrate that this framework can detect and mitigate the malicious commands before they manifest in the physical system with an average accuracy of 90%.
Homa Alemzadeh, Daniel Chen 0001, Thenkurussi Kesavadas, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
DSN2
2016 A hardware-in-the-loop simulator for safety training in robotic surgery
abstract
This paper presents a simulation-based safety training simulator for robot assisted surgery. While adverse events occur rarely during training, they could be fatal to the patients if they happen during real surgical procedures and are not handled properly by the surgical team. In this work we propose a hardware-in-the-loop robotic surgery simulator with high fidelity of the robot motion in a simulated environment, which is capable of reproducing adverse events during surgery. The proposed simulator is built upon the Raven-II open source surgical robot, integrated with a simulated surgeon console and a safety hazard injection engine, which automatically injects faults into modules of the robot control software. We simulate representative safety hazards seen in the adverse events, related to da Vinci™ robot, reported to the FDA MAUDE database. A novel haptic feedback strategy is provided to the operator when the underlying dynamics differ from the real robot states.
Homa Alemzadeh, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer, Thenkurussi Kesavadas
IROS3
2015 Systems-Theoretic Safety Assessment of Robotic Telesurgical Systems
Homa Alemzadeh, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Jaishankar Raman, Nancy G. Leveson, Ravishankar K. Iyer
SAFECOMP2
2014 Analysis and Diagnosis of SLA Violations in a Production SaaS Cloud
abstract
This paper investigates SLA violations of a production SaaS platform by means of joint use of field failure data analysis (FFDA) and fault injection. The objective of this study is to diagnose the causes of SLA violations, pinpoint critical failure modes under realistic error assumptions and identify potential means to increase the user perceived availability of the platform and assurance of SLA requirements. We base our study on 283 days of logs obtained during the production time of the platform, while it was employed to process business data received by 42 customers in 22 countries. In this paper, we develop a set of tools that include i) a FFDA toolset used to analyze the data extracted from the platform and by the operating system event logs and ii) a. NET/C++ injector able to automate the injection of specific runtime errors in the production code and the collection of results. Major findings include i) 93% of all service level agreement (SLA) violations were due to system failures, ii) there were a few cases of bursts of SLA violations that could not be diagnosed from the logs and were revealed from the performed injections, and iii) the error injection revealed several error propagation paths leading to data corruptions that could not be detected from the analysis of failure data.
Catello Di Martino, Daniel Chen 0001, Geetika Goel, Rajeshwari Ganesan, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
ISSRE2
2012 Characterization of the error resiliency of power grid substation devices
abstract
With the advent of modern technologies, microprocessor-based devices are used to monitor and control critical infrastructures, e.g., electric power grids, oil and gas distribution. However, the security and reliability of these microprocessor-based systems is a significant issue, since they are more susceptible to transient errors and malicious attacks. An error in one of these systems could have a cascading and catastrophic impact on the whole infrastructure. This paper explores the error resiliency of power grid substation devices. A software-implemented fault injection technique is used to induce errors/faults inside devices used in power grid substations. The goal is to test the ability of these systems to compute through errors/faults. Our results demonstrate that a single error in a substation device may render the operator in the control center unable to control the operation of a relay in the substation.
Kuan-Yu Tseng, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
DSN2
2011 CloudVal: A framework for validation of virtualization environment in cloud infrastructure
abstract
We present CloudVal, a framework to validate the reliability of virtualization environment in Cloud Computing infrastructure. A case study, based on injecting faults in the KVM hypervisor and Xen hypervisor, was conducted to show the viability of the framework. The study shows that due to the architectural differences between KVM and Xen, a direct comparison of the two virtualization systems is not feasible. In order to confidently weigh error resiliency of virtualization systems, more comprehensive studies are required. We believe, however, that the fault injection approach and the fault models proposed in this paper are a good starting point towards designing and implementing a benchmark which would enable the assessment of different virtualization infrastructures in a common manner.
Cuong Manh Pham, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
DSN2
2011 Automated Derivation of Application-Specific Error Detectors Using Dynamic Analysis
abstract
This paper proposes a novel technique for preventing a wide range of data errors from corrupting the execution of applications. The proposed technique enables automated derivation of fine-grained, application-specific error detectors based on dynamic traces of application execution. The technique derives a set of error detectors using rule-based templates to maximize the error detection coverage for the application. A probability model is developed to guide the choice of the templates and their parameters for error-detection. The paper also presents an automatic framework for synthesizing the set of detectors in hardware to enable low-overhead, runtime checking of the application. The coverage of the derived detectors is evaluated using fault-injection experiments, while the performance and area overheads of the detectors are evaluated by synthesizing them on reconfigurable hardware.
Karthik Pattabiraman, Giacinto Paolo Saggese, Daniel Chen 0001, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
IEEE Trans. Dependable Secur. Comput.3
2008 Error Behavior Comparison of Multiple Computing Systems: A Case Study Using Linux on Pentium, Solaris on SPARC, and AIX on POWER
abstract
This paper presents an approach to conducting experimental studies for the characterization and comparison of the error behavior in different computing systems. The proposed approach is applied to characterize and compare the error behavior of three commercial systems (Linux 2.6 on Pentium 4, Solaris 10 on UltraSPARC IIIi, and AIX 5.3 on POWER 5) under hardware transient faults. The data is obtained by conducting extensive fault injection into kernel code, kernel stack, and system registers with the NFTAPE framework while running the Apache Web server as a workload. The error behavior comparison shows that the Linux system has the highest average crash latency, the Solaris system has the highest hang rate, and the AIX system has the lowest error sensitivity and the least amount of crashes in the more severe categories.
Daniel Chen 0001, Gabriela Jacques-Silva, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer, Bruce G. Mealey
PRDC1