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Daniel C. O'Neill

dblp:121/1797 · DBLP profile ↗
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4ranked-venue papers
2as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 3 · 2 first-authorSystems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Energy-efficient computing · 44% Interconnection networks and networks-on-chip · 44% Electronic design automation · 6%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › power management
dynamic power management
0.112012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012
Energy-efficient computing › power-performance tradeoff
energy-delay tradeoff
0.112012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012
Interconnection networks and networks-on-chip › switch architecture
input-queued switch
0.112012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012
Interconnection networks and networks-on-chip › switch architecture
packet switch
0.112012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012
Parallel and multicore computing › parallel graph algorithms
maximum matching
0.012012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012
Electronic design automation › high-level synthesis
scheduling
0.012012
Power and Delay Aware Management of Packet Switches · IEEE Trans. Computers 2012

Methods — techniques the papers use, named apart from their topics

linear quadratic regulation · 0.1dynamic programming · 0.1
YearPublicationVenuePosition
2013 Delay-sensitive power management for packet switches
abstract
Power management has become a critical issue for communication and computing infrastructures. In this paper, we develop systematic and heuristic algorithms for managing communication switches with multiple speed (throughput) modes. Switch speed is increased by activating additional network processor cores, voltage/frequency scaling of the electronics, etc. Higher speed modes burn more power. The developed power (speed) control algorithms are responsive to switch queue backlogs and aim to efficiently trade backlog vs. power costs, so as to minimize the long-run overall backlog and power cost. We first systematically model the system in a Dynamic Programming (DP) framework, where the optimal control can be computed in principle. Unfortunately, the complexity is so high that even for a 2 × 2 switch the computation time is practically infeasible. We therefore develop an Approximate Dynamic Programming (ADP) algorithm based on the Q-learning framework, which has good computation and performance properties. We also develop two low-complexity heuristic power controls, one based on a “myopic” view of the control problem, and the other on “congestion-awareness” of the standard maximum weight matching scheme. We study the performance of the Q-learning and heuristic controls against the optimal one (which we can practically compute only for the 2×2 switch case), and comment on their efficiency. We also extend the method and results to the general case of multiprocessor computing resources.
Martin Valdez-Vivas, Nicholas Bambos, Daniel C. O'Neill
ICC3
2012 Power and Delay Aware Management of Packet Switches
abstract
Due to increasing circuit densities and data throughput rates, power consumption has become a significant concern in the design and operation of high-performance packet switches. We extend the idea of Dynamic Power Management (DPM) to input queued switches, allowing operators to tradeoff power and delay in a useful way. We frame the problem as a dynamic program and solve a relaxation using techniques from Linear Quadratic Regulation (LQR). This optimal policy is combined with existing, nonpower-aware switch controls to generate two novel scheduling algorithms: 1) LQR Power Aware Maximum Weight Matching (LQR PA MWM) and 2) LQR Power Aware Projective Cone Scheduling (LQR PA PCS). Simulation results suggest that our algorithms result in significant power savings compared to MWM and previous power control schemes with little performance degradation.
Lykomidis Mastroleon, Daniel C. O'Neill, Benjamin Yolken, Nicholas Bambos
IEEE Trans. Computers2
2003 Adaptive congestion control for wireless networks using TCP
abstract
This paper develops an optimal congestion control algorithm for wireless networks using TCP based on utility maximization techniques. The algorithm requires no modifications to TCP. The algorithm, termed CBW, adaptively responds to changes in network routing and topology. Several simulations are presented and indicate a substantial gain in throughput and a reduction in aggregate transmitter power. A simplified heuristic is also presented.
Daniel C. O'Neill
ICC1
2003 Power control for wireless networks using TCP/RED
abstract
This paper develops an optimal congestion control algorithm for wireless networks using TCP Reno/RED based on utility maximization techniques. The algorithm requires no modifications to TCP. Several simulations are presented and indicate a substantial gain in performance. A simplified heuristic is also presented.
Daniel C. O'Neill
WCNC1