VLDB 2026 Research / reviewers in the wild / expert
Kirti Dhwaj
dblp:124/3610
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2018
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › radio-frequency circuit design
all-digital transmitter |
0.3 | 1 | 2018 | A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Integrated circuit design
digital circuit design |
0.3 | 1 | 2018 | A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Methods — techniques the papers use, named apart from their topics
cartesian architecture · 0.3bandpass filter design · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | A Novel Fully Synthesizable All-Digital RF Transmitter for IoT ApplicationsabstractIn this paper, a fully synthesizable all-digital transmitter (ADTX) is first proposed. This transmitter (TX) uses Cartesian architecture and supports wide-band quadratic-amplitude modulation with wide carrier frequency range. Furthermore, the design methodology for ADTX and corresponding bandpass filter is discussed. This TX is synthesized with digital register transfer level-graphic database system flow, and can be easily implemented in any standard CMOS technology. An exemplary TX is synthesized by TSMC 28-nm standard cell library with extremely small area (0.0009 mm2) and supports carrier frequency as high as 6 GHz with excellent error vector magnitude (<;-30 dB). To the best of the authors' knowledge, this is the first work on a fully synthesizable design of RF transistors, allowing easy technology migration and portability. Yilei Li, Kirti Dhwaj, Chien-Heng Wong, Yuan Du, Yiwu Tang, Yiyu Shi 0001, Tatsuo Itoh, Mau-Chung Frank Chang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |