Daniel Larraz

dblp:124/8995 · DBLP profile ↗
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13ranked-venue papers
6as first author
3since 2021 · last 2024
0000-0001-5305-7340ORCID · verified

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Software engineering, systems software and programming languages · 9 · 5 first-author · 2 since 2021Theory of computation · 9 · 4 first-author · 1 since 2021Artificial intelligence and machine learning · 2 · 1 first-authorSecurity and privacy · 1 · 1 since 2021
YearPublicationVenuePosition
2024 A Comprehensive, Automated Security Analysis of the Uptane Automotive Over-the-Air Update Framework
abstract
We present our experience of formally verifying the desired security properties of the Uptane over-the-air (OTA) software update framework against a set of applicable threat models. Uptane is gaining traction in the automobile industry and is widely considered the next de-facto standard for OTA automobile software updates. The security of Uptane is of utmost importance because modern automobiles rely on software for their safety-critical functionalities and, especially, require OTA software updates to add new safety features or patch bugs in existing ones. Design flaws in Uptane can either violate the integrity of the updates to be installed or prevent vehicles from installing new updates, both of which can cause severe safety issues. Previous approaches to protocol verification either fail to capture the necessary features of Uptane or suffer from termination issues due to Uptane’s complexity. A key component of our approach lies in the eager combination of an infinite-state model checker and a cryptographic protocol verifier, where (in contrast to prior lazy approaches) we are able to eliminate a key manual step in the workflow while enabling reasoning over more fine-grained message structures. In addition, our approach utilizes two proven soundness- and completeness-preserving state-space-reduction optimizations for computational tractability, as well as a meta-level analysis technique that makes it feasible to reason over Uptane’s set of optional protocol features. Our approach is able to discover six new vulnerabilities while rediscovering all five known ones. While there have been previous analyses of Uptane’s security properties, they either missed design flaws identified by our approach or suffered from coverage and termination issues. The Uptane standards body has positively acknowledged our findings and has suggested updates to the protocol specification documents to address them.
Robert Lorch, Daniel Larraz, Cesare Tinelli, Omar Chowdhury
RAID2
2023 CRV: Automated Cyber-Resiliency Reasoning for System Design Models
Daniel Larraz, Robert Lorch, Moosa Yahyazadeh, M. Fareed Arif, Omar Chowdhury, Cesare Tinelli
FMCAD1
2021 Merit and Blame Assignment with Kind 2
Daniel Larraz, Mickaël Laurent, Cesare Tinelli
FMICS1
2020 SYSLITE: Syntax-Guided Synthesis of PLTL Formulas from Finite Traces
abstract
We present an efficient approach to learn past-time linear temporal logic formulas (PLTL) from a set of propositional variables and a sample of finite traces over those variables.The efficiency of our approach can be attributed to a careful encoding of the PLTL formula learning problem as a bit-vector function synthesis problem, and the use of an enhanced Syntax-Guided Synthesis (SyGuS) engine to solve the latter.We implemented our approach in a tool called SYSLITE and empirically evaluated its efficacy with two case studies.In these case studies, we observe that SYSLITE on average enjoys a speedup of 44x over current learning approaches for temporal formulas while learning the expected formulas in the vast majority of cases.
M. Fareed Arif, Daniel Larraz, Mitziu Echeverria, Andrew Reynolds 0001, Omar Chowdhury, Cesare Tinelli
FMCAD2
2019 Extending enumerative function synthesis via SMT-driven classification
abstract
Many relevant problems in formal methods can be tackled using enumerative syntax-guided synthesis (SyGuS). Algorithms for enumerative SyGuS range from universally applicable techniques based on counterexample-guided inductive synthesis (CEGIS), to more scalable but specialized techniques based on divide and conquer. This paper presents a novel algorithm for enumerative SyGuS, Unif + PI, which reaps the benefits of scalability based on divide and conquer without sacrificing generality. In this algorithm, an instance of an SMT solver is used as both a classifier and an attribute generator. Logical constraints in the form of test cases for the function-to-synthesize and failed classification attempts guide its search for new candidate solutions. We implement our approach as an extension of the CVC4SY solver and evaluate it on standard SyGuS benchmarks from different applications. We show that the new algorithm leads to significant gains in invariant synthesis with respect to state-of-the-art SyGuS solvers, and is competitive with state-of-the-art k-induction based model checking.
Haniel Barbosa, Andrew Reynolds 0001, Daniel Larraz, Cesare Tinelli
FMCAD3
2019 Incomplete SMT Techniques for Solving Non-Linear Formulas over the Integers
abstract
We present new methods for solving the Satisfiability Modulo Theories problem over the theory of Quantifier-Free Non-linear Integer Arithmetic, SMT(QF-NIA), which consists of deciding the satisfiability of ground formulas with integer polynomial constraints. Following previous work, we propose to solve SMT(QF-NIA) instances by reducing them to linear arithmetic: non-linear monomials are linearized by abstracting them with fresh variables and by performing case splitting on integer variables with finite domain. For variables that do not have a finite domain, we can artificially introduce one by imposing a lower and an upper bound and iteratively enlarge it until a solution is found (or the procedure times out). The key for the success of the approach is to determine, at each iteration, which domains have to be enlarged. Previously, unsatisfiable cores were used to identify the domains to be changed, but no clue was obtained as to how large the new domains should be. Here, we explain two novel ways to guide this process by analyzing solutions to optimization problems: (i) to minimize the number of violated artificial domain bounds, solved via a Max-SMT solver, and (ii) to minimize the distance with respect to the artificial domains, solved via an Optimization Modulo Theories (OMT) solver. Using this SMT-based optimization technology allows smoothly extending the method to also solve Max-SMT problems over non-linear integer arithmetic. Finally, we leverage the resulting Max-SMT(QF-NIA) techniques to solve ∃ ∀ formulas in a fragment of quantified non-linear arithmetic that appears commonly in verification and synthesis applications.
Cristina Borralleras, Daniel Larraz, Enric Rodríguez-Carbonell, Albert Oliveras, Albert Rubio
ACM Trans. Comput. Log.2
2017 Proving Termination Through Conditional Termination
Cristina Borralleras, Marc Brockschmidt, Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
TACAS (1)3
2016 Speeding up the Constraint-Based Method in Difference Logic
Lorenzo Candeago, Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
SAT2
2015 Compositional Safety Verification with Max-SMT
abstract
We present an automated compositional program verification technique for safety properties based on conditional inductive invariants. For a given program part (e.g., a single loop) and a postcondition ϕ, we show how to, using a Max-SMT solver, an inductive invariant together with a precondition can be synthesized so that the precondition ensures the validity of the invariant and that the invariant implies ϕ. From this, we build a bottom-up program verification framework that propagates preconditions of small program parts as postconditions for preceding program parts. The method recovers from failures to prove the validity of a precondition, using the obtained intermediate results to restrict the search space for further proof attempts. As only small program parts need to be handled at a time, our method is scalable and distributable. The derived conditions can be viewed as implicit contracts between different parts of the program, and thus enable an incremental program analysis.
Marc Brockschmidt, Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
FMCAD2
2014 Proving Non-termination Using Max-SMT
Daniel Larraz, Kaustubh Nimkar, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
CAV1
2014 Minimal-Model-Guided Approaches to Solving Polynomial Constraints and Extensions
Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
SAT1
2013 Proving termination of imperative programs using Max-SMT
Daniel Larraz, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
FMCAD1
2013 SMT-Based Array Invariant Generation
Daniel Larraz, Enric Rodríguez-Carbonell, Albert Rubio
VMCAI1