VLDB 2026 Research / reviewers in the wild / expert
Zhihong Luo
dblp:127/3190 · also Zhi-Hong Luo
· DBLP profile ↗
12ranked-venue papers
6as first author
7since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 7 · 3 first-author · 3 since 2021Systems, architecture and hardware · 3 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 3 · 3 first-author · 3 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Making Cellular Networks More Efficient By Roaming-in-PlaceabstractWe propose Roaming-in-Place (RinP), a technique for dynamically sharing capacity across mobile network operators. RinP is a new form of infrastructure sharing that expands the traditional notion of roaming in cellular networks such that users may roam between operators with overlapping coverage areas based on load and performance conditions. Using simulation and small-scale experiments, we show that deploying RinP would allow operators to run their networks at higher utilization and provide users with higher availability and performance, while achieving 30–40% infrastructure savings in our typical evaluation scenarios. We present a design for RinP that can be incrementally deployed with modest changes to existing cellular infrastructure. We build a prototype RinP testbed, and show that our proposed design can be realized feasibly with modest changes to existing cellular infrastructure, requires no change to current protocol standards, and adds minimal latency overheads. Tenzin Samten Ukyab, Lisa Suzuki, Demetrius Davis, Zhihong Luo, Silvery D. Fu, Shaddi Hasan, Sylvia Ratnasamy, Scott Shenker |
SIGCOMM | 4 |
| 2024 | Efficient Microsecond-scale Blind Scheduling with Tiny QuantaabstractA longstanding performance challenge in datacenter-based applications is how to efficiently handle incoming client requests that spawn many very short (μs scale) jobs that must be handled with high throughput and low tail latency. When no assumptions are made about the duration of individual jobs, or even about the distribution of their durations, this requires blind scheduling with frequent and efficient preemption, which is not scalably supported for μs-level tasks. We present Tiny Quanta (TQ), a system that enables efficient blind scheduling of μs-level workloads. TQ performs fine-grained preemptive scheduling and does so with high performance via a novel combination of two mechanisms: forced multitasking and two-level scheduling. Evaluations with a wide variety of μs-level workloads show that TQ achieves low tail latency while sustaining 1.2x to 6.8x the throughput of prior blind scheduling systems. Zhihong Luo, Sam Son, Dev Bali, Emmanuel Amaro, Amy Ousterhout, Sylvia Ratnasamy, Scott Shenker |
ASPLOS (2) | 1 |
| 2024 | Harvesting Memory-bound CPU Stall Cycles in Software with MSH
Zhihong Luo, Sam Son, Sylvia Ratnasamy, Scott Shenker |
OSDI | 1 |
| 2024 | Synthesizing Step-Down Switched Capacitor Power Converter TopologiesabstractThe fast-growing development in wearable electronic devices leads to high demand for small-volume, lightweight, and high-efficiency DC-DC power converters, particularly switched capacitor (SC) DC-DC converters. In this paper, we propose a synthesis framework of step-down SC DC-DC power converters to obtain an optimum converter topology under the design constraints of the conversion ratio and a minimum number of capacitors. The proposed rule-based clustering reduction techniques have reduced the search space and sped up the conversion ratio analysis. In the case study of 8:1 converter synthesis, the run-time for conversion ratio analysis is reduced by 1.26$\boldsymbol{\times}$$\boldsymbol{10^6}$. The proposed efficiency optimization method has improved the peak efficiencies of the cascaded 2:1 converter and Fibonacci converter by 4.7% and 12.8%. The proposed framework has identified new topologies and variants of conventional topologies. The variant of cascaded 2:1 converter shows an improvement of 8.2% on peak efficiency. Zhiwen Gu, Yuhang Zhang 0008, Yang Zhao 0052, Yanhan Zeng, Zhihong Luo, Yongfu Li 0002 |
IEEE Trans. Circuits Syst. I Regul. Pap. | 6 |
| 2023 | Out of Hand for Hardware? Within Reach for Software!abstractEvents that take 10s to 100s of ns like cache misses increasingly cause CPU stalls. However, hiding the latency of these events is challenging: hardware mechanisms suffer from the lack of flexibility, whereas prior software mechanisms fall short due to large overhead and limited event visibility. In this paper, we argue that with a combination of two emerging techniques - light-weight coroutines and sample-based profiling, hiding these events in software is within reach. Zhihong Luo, Silvery D. Fu, Emmanuel Amaro, Amy Ousterhout, Sylvia Ratnasamy, Scott Shenker |
HotOS | 1 |
| 2023 | LOCA: A Location-Oblivious Cellular Architecture
Zhihong Luo, Silvery D. Fu, Natacha Crooks, Shaddi Hasan, Christian Maciocco, Sylvia Ratnasamy, Scott Shenker |
NSDI | 1 |
| 2021 | Democratizing cellular access with CellBricksabstractMarkets in which competition thrives are good for both consumers and innovation but, unfortunately, competition is not thriving in the increasingly important cellular market. We propose CellBricks, a novel cellular architecture that lowers the barrier to entry for new operators by enabling users to consume access on-demand from any available cellular operator — small or large, trusted or untrusted. CellBricks achieves this by moving support for mobility and user management (authentication and billing) out of the network and into end hosts. These changes, we believe, bring valuable benefits beyond enabling competition: they lead to a cellular infrastructure that is simpler and more efficient. Zhihong Luo, Silvery D. Fu, Mark Theis, Shaddi Hasan, Sylvia Ratnasamy, Scott Shenker |
SIGCOMM | 1 |
| 2020 | Can far memory improve job throughput?abstractAs memory requirements grow, and advances in memory technology slow, the availability of sufficient main memory is increasingly the bottleneck in large compute clusters. One solution to this is memory disaggregation, where jobs can remotely access memory on other servers, or far memory. This paper first presents faster swapping mechanisms and a far memory-aware cluster scheduler that make it possible to support far memory at rack scale. Then, it examines the conditions under which this use of far memory can increase job throughput. We find that while far memory is not a panacea, for memory-intensive workloads it can provide performance improvements on the order of 10% or more even without changing the total amount of memory available. Emmanuel Amaro, Christopher Branner-Augmon, Zhihong Luo, Amy Ousterhout, Marcos K. Aguilera, Aurojit Panda, Sylvia Ratnasamy, Scott Shenker |
EuroSys | 3 |
| 2020 | Remote Memory CallsabstractIn this paper we propose an extension to RDMA, called Remote Memory Calls (RMCs), that allows applications to install a customized set of 1-sided RDMA operations. We then explain how RMCs can be implemented on the forthcoming generation of SmartNICs and discuss the resulting tradeoffs between RMCs, 1-sided and 2-sided RDMA operations. Emmanuel Amaro, Zhihong Luo, Amy Ousterhout, Arvind Krishnamurthy, Aurojit Panda, Sylvia Ratnasamy, Scott Shenker |
HotNets | 2 |
| 2019 | 3D Backscatter Localization for Fine-Grained Robotics
Zhihong Luo, Qiping Zhang, Fadel Adib |
NSDI | 1 |
| 2018 | Enabling deep-tissue networking for miniature medical devicesabstractWe present IVN (In-Vivo Networking), a system that enables powering up and communicating with miniature sensors implanted or injected in deep tissues. IVN overcomes fundamental challenges which have prevented past systems from powering up miniature sensors beyond superficial depths. These challenges include the significant signal attenuation caused by bodily tissues and the miniature antennas of the implantable sensors. Zhihong Luo, Christoph Steiger, Giovanni Traverso, Fadel Adib |
SIGCOMM | 2 |
| 2017 | RF-Echo: A Non-Line-of-Sight Indoor Localization System Using a Low-Power Active RF Reflector ASIC TagabstractLong-range low-power localization is a key technology that enables a host of new applications of wireless sensor nodes. We present RF-Echo, a new low-power RF localization solution that achieves decimeter accuracy in long range indoor non-line-of-sight (NLOS) scenarios. RF-Echo introduces a custom-designed active RF reflector ASIC (application specific integrated circuit) fabricated in a 180nm CMOS process which echoes a frequency-shifted orthogonal frequency division multiplexing (OFDM) signal originally generated from an anchor. The proposed technique is based on time-of-flight (ToF) estimation in the frequency domain that effectively eliminates inter-carrier and inter-symbol interference in multipath-rich indoor NLOS channels. RF-Echo uses a relatively narrow bandwidth of $\leq$80 MHz which does not require an expensive very high sampling rate analog-to-digital converter (ADC). Unlike ultra-wideband (UWB) systems, the active reflection scheme is designed to operate at a relatively low carrier frequency that can penetrate building walls and other blocking objects for challenging NLOS scenarios. Since the bandwidth at lower frequencies (2.4 GHz and sub-1 GHz) is severely limited, we propose novel signal processing algorithms as well as machine learning techniques to significantly enhance the localization resolution given the bandwidth constraint of the proposed system. The newly fabricated tag IC consumes 62.8 mW active power. The software defined radio (SDR) based anchor prototype is rapidly deployable without the need for accurate synchronization among anchors and tags. Field trials conducted in a university building confirm up to 85 m operation with decimeter accuracy for robust 2D localization. Li-Xuan Chuo, Zhihong Luo, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim |
MobiCom | 2 |